From patchwork Thu Jun 23 16:33:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 9195591 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 19E146077D for ; Thu, 23 Jun 2016 16:42:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0AD262843C for ; Thu, 23 Jun 2016 16:42:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F3D9A2845C; Thu, 23 Jun 2016 16:42:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 12FEA2843C for ; Thu, 23 Jun 2016 16:42:46 +0000 (UTC) Received: from localhost ([::1]:38005 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bG7iH-0006Qs-P7 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 23 Jun 2016 12:42:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43487) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bG7a9-0005fd-QV for qemu-devel@nongnu.org; Thu, 23 Jun 2016 12:34:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bG7a6-0001bt-JU for qemu-devel@nongnu.org; Thu, 23 Jun 2016 12:34:21 -0400 Received: from 19.mo1.mail-out.ovh.net ([178.32.97.206]:34839) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bG7a6-0001bR-A4 for qemu-devel@nongnu.org; Thu, 23 Jun 2016 12:34:18 -0400 Received: from player758.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo1.mail-out.ovh.net (Postfix) with ESMTP id A0AA4FF8D3B for ; Thu, 23 Jun 2016 18:34:13 +0200 (CEST) Received: from hermes.kaod.org (LFbn-1-2234-107.w90-76.abo.wanadoo.fr [90.76.55.107]) (Authenticated sender: clg@kaod.org) by player758.ha.ovh.net (Postfix) with ESMTPSA id 253C32C0087; Thu, 23 Jun 2016 18:34:05 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Peter Maydell , Peter Crosthwaite Date: Thu, 23 Jun 2016 18:33:26 +0200 Message-Id: <1466699607-30406-5-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1466699607-30406-1-git-send-email-clg@kaod.org> References: <1466699607-30406-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1118300083696667409 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeltddrtdeigdelfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 178.32.97.206 Subject: [Qemu-devel] [PATCH v3 4/5] ast2400: create SPI flash slaves X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kwolf@redhat.com, Andrew Jeffery , qemu-devel@nongnu.org, armbru@redhat.com, qemu-arm@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP A set of SPI flash slaves is attached under the flash controllers of the palmetto platform. "n25q256a" flash modules are used for the BMC and "mx25l25635e" for the host. These types are common in the OpenPower ecosystem. The segment addresses used for the memory mappings are the defaults provided by the specs. They can be changed with the Segment Address Register but this is not supported in the current implementation. Signed-off-by: Cédric Le Goater --- Changes since v2 : - moved the initialization of the flash modules under the palmetto platform hw/arm/palmetto-bmc.c | 28 ++++++++++++++++++++++++++ hw/ssi/aspeed_smc.c | 48 ++++++++++++++++++++++++++++++++++++++++++--- include/hw/ssi/aspeed_smc.h | 8 ++++++++ 3 files changed, 81 insertions(+), 3 deletions(-) diff --git a/hw/arm/palmetto-bmc.c b/hw/arm/palmetto-bmc.c index b8eed21348d8..d4abf3ca61ab 100644 --- a/hw/arm/palmetto-bmc.c +++ b/hw/arm/palmetto-bmc.c @@ -18,6 +18,8 @@ #include "hw/arm/ast2400.h" #include "hw/boards.h" #include "qemu/log.h" +#include "sysemu/block-backend.h" +#include "sysemu/blockdev.h" static struct arm_boot_info palmetto_bmc_binfo = { .loader_start = AST2400_SDRAM_BASE, @@ -30,6 +32,29 @@ typedef struct PalmettoBMCState { MemoryRegion ram; } PalmettoBMCState; +static void palmetto_bmc_init_flashes(AspeedSMCState *s, const char *flashtype, + Error **errp) +{ + int i ; + + for (i = 0; i < s->num_cs; ++i) { + AspeedSMCFlashState *fl = s->flashes[i]; + DriveInfo *dinfo = drive_get_next(IF_MTD); + qemu_irq cs_line; + + /* SPI Flash module */ + fl->flash = ssi_create_slave_no_init(s->spi, flashtype); + if (dinfo) { + qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), + errp); + } + qdev_init_nofail(fl->flash); + + cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); + sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); + } +} + static void palmetto_bmc_init(MachineState *machine) { PalmettoBMCState *bmc; @@ -49,6 +74,9 @@ static void palmetto_bmc_init(MachineState *machine) object_property_set_bool(OBJECT(&bmc->soc), true, "realized", &error_abort); + palmetto_bmc_init_flashes(&bmc->soc.smc, "n25q256a", &error_abort); + palmetto_bmc_init_flashes(&bmc->soc.spi, "mx25l25635e", &error_abort); + palmetto_bmc_binfo.kernel_filename = machine->kernel_filename; palmetto_bmc_binfo.initrd_filename = machine->initrd_filename; palmetto_bmc_binfo.kernel_cmdline = machine->kernel_cmdline; diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index d97c077565c3..6be911ed36d0 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -98,13 +98,32 @@ #define R_SPI_MISC_CRTL (0x10 / 4) #define R_SPI_TIMINGS (0x14 / 4) +/* + * Default segments mappings and size for each slave + */ +static const AspeedSegments aspeed_segments_legacy[] = { + { 0x14000000, 32 * 1024 * 1024 }, +}; + +static const AspeedSegments aspeed_segments_fmc[] = { + { 0x20000000, 64 * 1024 * 1024 }, + { 0x24000000, 32 * 1024 * 1024 }, + { 0x26000000, 32 * 1024 * 1024 }, + { 0x28000000, 32 * 1024 * 1024 }, + { 0x2A000000, 32 * 1024 * 1024 } +}; + +static const AspeedSegments aspeed_segments_spi[] = { + { 0x30000000, 64 * 1024 * 1024 }, +}; + static const AspeedSMCController controllers[] = { { "aspeed.smc.smc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, - CONF_ENABLE_W0, 5 }, + CONF_ENABLE_W0, 5, aspeed_segments_legacy }, { "aspeed.smc.fmc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS, - CONF_ENABLE_W0, 5 }, + CONF_ENABLE_W0, 5, aspeed_segments_fmc }, { "aspeed.smc.spi", R_SPI_CONF, 0xff, R_SPI_CTRL0, R_SPI_TIMINGS, - SPI_CONF_ENABLE_W0, 1 }, + SPI_CONF_ENABLE_W0, 1, aspeed_segments_spi }, }; static bool aspeed_smc_is_ce_stop_active(AspeedSMCState *s, int cs) @@ -217,6 +236,8 @@ static const MemoryRegionOps aspeed_smc_ops = { .valid.unaligned = true, }; +static const MemoryRegionOps aspeed_smc_flash_ops; + static void aspeed_smc_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); @@ -254,6 +275,27 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_ops, s, s->ctrl->name, ASPEED_SMC_R_MAX * 4); sysbus_init_mmio(sbd, &s->mmio); + + s->flashes = g_new0(AspeedSMCFlashState *, s->num_cs); + + for (i = 0; i < s->num_cs; ++i) { + Object *obj = object_new(TYPE_ASPEED_SMC_FLASH); + AspeedSMCFlashState *fl = ASPEED_SMC_FLASH(obj); + char name[32]; + + s->flashes[i] = fl; + + snprintf(name, sizeof(name), "%s.%d", s->ctrl->name, i); + + fl->id = i; + fl->controller = s; + fl->size = s->ctrl->segments[i].size; + + memory_region_init_io(&fl->mmio, obj, &aspeed_smc_flash_ops, fl, name, + fl->size); + sysbus_init_mmio(SYS_BUS_DEVICE(fl), &fl->mmio); + sysbus_mmio_map(SYS_BUS_DEVICE(fl), 0, s->ctrl->segments[i].addr); + } } static const VMStateDescription vmstate_aspeed_smc = { diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index abd0005b01c2..10b4083952cf 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -43,6 +43,11 @@ typedef struct AspeedSMCFlashState { #define ASPEED_SMC_FLASH(obj) \ OBJECT_CHECK(AspeedSMCFlashState, (obj), TYPE_ASPEED_SMC_FLASH) +typedef struct AspeedSegments { + hwaddr addr; + uint32_t size; +} AspeedSegments; + typedef struct AspeedSMCController { const char *name; uint8_t r_conf; @@ -51,6 +56,7 @@ typedef struct AspeedSMCController { uint8_t r_timings; uint8_t conf_enable_w0; uint8_t max_slaves; + const AspeedSegments *segments; } AspeedSMCController; #define TYPE_ASPEED_SMC "aspeed.smc" @@ -90,6 +96,8 @@ typedef struct AspeedSMCState { uint8_t r_ctrl0; uint8_t r_timings; uint8_t conf_enable_w0; + + AspeedSMCFlashState **flashes; } AspeedSMCState; #endif /* ASPEED_SMC_H */