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[RFC,18/30] target-i386: emulate XCHG using atomic helper

Message ID 1467054136-10430-19-git-send-email-cota@braap.org (mailing list archive)
State New, archived
Headers show

Commit Message

Emilio Cota June 27, 2016, 7:02 p.m. UTC 
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
 target-i386/translate.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)
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Patch

diff --git a/target-i386/translate.c b/target-i386/translate.c
index b76b0ae..48c6742 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1325,6 +1325,8 @@  GEN_ATOMIC_HELPER(and_fetch)
 GEN_ATOMIC_HELPER(or_fetch)
 GEN_ATOMIC_HELPER(sub_fetch)
 GEN_ATOMIC_HELPER(xor_fetch)
+
+GEN_ATOMIC_HELPER(xchg)
 #undef GEN_ATOMIC_HELPER
 
 /* if d == OR_TMP0, it means memory operand (address in A0) */
@@ -5666,12 +5668,7 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
             gen_lea_modrm(env, s, modrm);
             gen_op_mov_v_reg(ot, cpu_T0, reg);
             /* for xchg, lock is implicit */
-            if (!(prefixes & PREFIX_LOCK))
-                gen_helper_lock();
-            gen_op_ld_v(s, ot, cpu_T1, cpu_A0);
-            gen_op_st_v(s, ot, cpu_T0, cpu_A0);
-            if (!(prefixes & PREFIX_LOCK))
-                gen_helper_unlock();
+            gen_atomic_xchg(cpu_T1, cpu_A0, cpu_T0, ot);
             gen_op_mov_reg_v(ot, reg, cpu_T1);
         }
         break;