From patchwork Tue Jun 28 00:38:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 9201565 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BC0E560752 for ; Tue, 28 Jun 2016 00:40:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC867285DB for ; Tue, 28 Jun 2016 00:40:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A15C0285E5; Tue, 28 Jun 2016 00:40:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1B25D285DB for ; Tue, 28 Jun 2016 00:40:35 +0000 (UTC) Received: from localhost ([::1]:33451 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHh4s-0002nR-6I for patchwork-qemu-devel@patchwork.kernel.org; Mon, 27 Jun 2016 20:40:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43721) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHh4E-0002iS-Dk for qemu-devel@nongnu.org; Mon, 27 Jun 2016 20:39:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHh4D-0004Pm-8C for qemu-devel@nongnu.org; Mon, 27 Jun 2016 20:39:54 -0400 Received: from mail-qk0-x243.google.com ([2607:f8b0:400d:c09::243]:35632) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHh4D-0004Pe-2r for qemu-devel@nongnu.org; Mon, 27 Jun 2016 20:39:53 -0400 Received: by mail-qk0-x243.google.com with SMTP id b136so323330qkg.2 for ; Mon, 27 Jun 2016 17:39:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=oYQjPmpR7GHkWHUujmXU3NJsJC14DE0jAY35xQNVT30=; b=AsDSkfo4cS6/XsfyGrbsAl1LhRSoCg93k2viIomM4KaLYWv3xtVAZHSOl/qqHI/77h ibvyfh+Wab/HTCbUOLF1SQOA58+uyJksGF3Ak7JgQ4nAGjHaGy7gcc3nTlSwRVFWg643 pc5EiIOgx1Lw9y6WADSTfCui0PJEq3toWqW2sVoqWMx5f56AjJtTSX9t7q6faQNG/2Jo sUsUF/o3iPcA3R81iztJQIM6vBtAchQazVbVvqymxJqQZrkVLNNO8+ZwWgL2BHAOiLtm rpfx2qXdTjlgjCRKbyePY5ABhZsei/oUiO5EFUpCPuI2Znr5oYKOd0GFNFeaSLiunud/ 3PHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=oYQjPmpR7GHkWHUujmXU3NJsJC14DE0jAY35xQNVT30=; b=i4lzQdY+4G/IOuDVwLlQyMXzIx3heJ2SbomU/4CZDaTi/3DjFLghFCfmBDCiJniQXJ hnTzHyhP2fNpD4xO8yz8T6reY5kGzF4tOEn84YcISXv/THF8YkfctAjufLHDeWWPIgzS DZlJs470quXQOX0WDFrPpfVAzlRMFh7aRQ7gVs2SFn2rUp/RUDmGl61uiIa88M4pF1Ju dlK1IfWv5AN1sVs6nC/YlTqkRca8I1w3hYp9kOYhj2TA9/EF5T0rfueruXQdOgN2gFMA 7Tl240k5W6JfYvVuQKjm+r2luraXuBRJszZKthZcwZcEwgi+ghthqgk46/D53rXqWiPs p1mg== X-Gm-Message-State: ALyK8tIOa4jgTeKrQE4OWS3m49ll+UvNGACunuMLBOI/5xCCDq2P5GrUE0ZbwBDQRYEdCQ== X-Received: by 10.55.113.7 with SMTP id m7mr246550qkc.90.1467074392657; Mon, 27 Jun 2016 17:39:52 -0700 (PDT) Received: from bigtime.com (71-37-54-227.tukw.qwest.net. [71.37.54.227]) by smtp.gmail.com with ESMTPSA id 128sm190406qke.10.2016.06.27.17.39.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Jun 2016 17:39:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 27 Jun 2016 17:38:57 -0700 Message-Id: <1467074353-26130-9-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1467074353-26130-1-git-send-email-rth@twiddle.net> References: <1467074353-26130-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PATCH v4 08/24] target-sparc: Pass TCGMemOp to gen_ld/st_asi X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.cave-ayland@ilande.co.uk Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Reviewed-By: Artyom Tarasenko Signed-off-by: Richard Henderson --- target-sparc/translate.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 532ad3e..886e132 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2016,7 +2016,7 @@ static DisasASI get_asi(DisasContext *dc, int insn) } static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr, - int insn, int size, int sign) + int insn, TCGMemOp memop) { DisasASI da = get_asi(dc, insn); @@ -2026,8 +2026,8 @@ static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(size); - TCGv_i32 r_sign = tcg_const_i32(sign); + TCGv_i32 r_size = tcg_const_i32(1 << (memop & MO_SIZE)); + TCGv_i32 r_sign = tcg_const_i32(!!(memop & MO_SIGN)); save_state(dc); #ifdef TARGET_SPARC64 @@ -2049,7 +2049,7 @@ static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr, } static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr, - int insn, int size) + int insn, TCGMemOp memop) { DisasASI da = get_asi(dc, insn); @@ -2059,7 +2059,7 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr, default: { TCGv_i32 r_asi = tcg_const_i32(da.asi); - TCGv_i32 r_size = tcg_const_i32(size); + TCGv_i32 r_size = tcg_const_i32(1 << (memop & MO_SIZE)); save_state(dc); #ifdef TARGET_SPARC64 @@ -4833,13 +4833,13 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) break; #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) case 0x10: /* lda, V9 lduwa, load word alternate */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 4, 0); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TEUL); break; case 0x11: /* lduba, load unsigned byte alternate */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 1, 0); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_UB); break; case 0x12: /* lduha, load unsigned halfword alternate */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 2, 0); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TEUW); break; case 0x13: /* ldda, load double word alternate */ if (rd & 1) { @@ -4848,10 +4848,10 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) gen_ldda_asi(dc, cpu_val, cpu_addr, insn, rd); goto skip_move; case 0x19: /* ldsba, load signed byte alternate */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 1, 1); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_SB); break; case 0x1a: /* ldsha, load signed halfword alternate */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 2, 1); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TESW); break; case 0x1d: /* ldstuba -- XXX: should be atomically */ gen_ldstub_asi(dc, cpu_val, cpu_addr, insn); @@ -4880,10 +4880,10 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) tcg_gen_qemu_ld64(cpu_val, cpu_addr, dc->mem_idx); break; case 0x18: /* V9 ldswa */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 4, 1); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TESL); break; case 0x1b: /* V9 ldxa */ - gen_ld_asi(dc, cpu_val, cpu_addr, insn, 8, 0); + gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TEQ); break; case 0x2d: /* V9 prefetch, no effect */ goto skip_move; @@ -5015,13 +5015,13 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) break; #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) case 0x14: /* sta, V9 stwa, store word alternate */ - gen_st_asi(dc, cpu_val, cpu_addr, insn, 4); + gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_TEUL); break; case 0x15: /* stba, store byte alternate */ - gen_st_asi(dc, cpu_val, cpu_addr, insn, 1); + gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_UB); break; case 0x16: /* stha, store halfword alternate */ - gen_st_asi(dc, cpu_val, cpu_addr, insn, 2); + gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_TEUW); break; case 0x17: /* stda, store double word alternate */ if (rd & 1) { @@ -5036,7 +5036,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) tcg_gen_qemu_st64(cpu_val, cpu_addr, dc->mem_idx); break; case 0x1e: /* V9 stxa */ - gen_st_asi(dc, cpu_val, cpu_addr, insn, 8); + gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_TEQ); break; #endif default: