From patchwork Sun Jul 10 18:08:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 9222745 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8F75460772 for ; Sun, 10 Jul 2016 18:13:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 82CCD264F4 for ; Sun, 10 Jul 2016 18:13:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 759AB2711E; Sun, 10 Jul 2016 18:13:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B0E14264F4 for ; Sun, 10 Jul 2016 18:13:41 +0000 (UTC) Received: from localhost ([::1]:56333 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bMJEa-0007FN-R0 for patchwork-qemu-devel@patchwork.kernel.org; Sun, 10 Jul 2016 14:13:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54353) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bMJAW-0002Gz-U2 for qemu-devel@nongnu.org; Sun, 10 Jul 2016 14:09:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bMJAU-0002KY-9B for qemu-devel@nongnu.org; Sun, 10 Jul 2016 14:09:27 -0400 Received: from chuckie.co.uk ([82.165.15.123]:54273 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bMJAT-0002J2-Ub; Sun, 10 Jul 2016 14:09:26 -0400 Received: from host86-138-127-109.range86-138.btcentralplus.com ([86.138.127.109] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1bMJAK-0005n4-BY; Sun, 10 Jul 2016 19:09:18 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Date: Sun, 10 Jul 2016 19:08:54 +0100 Message-Id: <1468174138-32128-3-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1468174138-32128-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1468174138-32128-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.138.127.109 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 2/6] dbdma: add per-channel debugging enabled via DEBUG_DBDMA_CHANMASK X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP By default large amounts of DBDMA debugging are produced when often it is just 1 or 2 channels that are of interest. Introduce DEBUG_DBDMA_CHANMASK to allow the developer to select the channels of interest at compile time, and then further add the extra channel information to each debug statement where possible. Also clearly mark the start/end of DBDMA_run_bh to allow tracking the bottom half execution. Signed-off-by: Mark Cave-Ayland Acked-by: Benjamin Herrenschmidt --- hw/misc/macio/mac_dbdma.c | 75 +++++++++++++++++++++++++-------------------- 1 file changed, 42 insertions(+), 33 deletions(-) diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c index b6639f4..8e4b208 100644 --- a/hw/misc/macio/mac_dbdma.c +++ b/hw/misc/macio/mac_dbdma.c @@ -46,6 +46,7 @@ /* debug DBDMA */ #define DEBUG_DBDMA 0 +#define DEBUG_DBDMA_CHANMASK ((1ul << DBDMA_CHANNELS) - 1) #define DBDMA_DPRINTF(fmt, ...) do { \ if (DEBUG_DBDMA) { \ @@ -53,6 +54,14 @@ } \ } while (0); +#define DBDMA_DPRINTFCH(ch, fmt, ...) do { \ + if (DEBUG_DBDMA) { \ + if ((1ul << (ch)->channel) & DEBUG_DBDMA_CHANMASK) { \ + printf("DBDMA[%02x]: " fmt , (ch)->channel, ## __VA_ARGS__); \ + } \ + } \ +} while (0); + /* */ @@ -79,26 +88,26 @@ static void dump_dbdma_cmd(dbdma_cmd *cmd) #endif static void dbdma_cmdptr_load(DBDMA_channel *ch) { - DBDMA_DPRINTF("dbdma_cmdptr_load 0x%08x\n", - ch->regs[DBDMA_CMDPTR_LO]); + DBDMA_DPRINTFCH(ch, "dbdma_cmdptr_load 0x%08x\n", + ch->regs[DBDMA_CMDPTR_LO]); dma_memory_read(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO], &ch->current, sizeof(dbdma_cmd)); } static void dbdma_cmdptr_save(DBDMA_channel *ch) { - DBDMA_DPRINTF("dbdma_cmdptr_save 0x%08x\n", - ch->regs[DBDMA_CMDPTR_LO]); - DBDMA_DPRINTF("xfer_status 0x%08x res_count 0x%04x\n", - le16_to_cpu(ch->current.xfer_status), - le16_to_cpu(ch->current.res_count)); + DBDMA_DPRINTFCH(ch, "dbdma_cmdptr_save 0x%08x\n", + ch->regs[DBDMA_CMDPTR_LO]); + DBDMA_DPRINTFCH(ch, "xfer_status 0x%08x res_count 0x%04x\n", + le16_to_cpu(ch->current.xfer_status), + le16_to_cpu(ch->current.res_count)); dma_memory_write(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO], &ch->current, sizeof(dbdma_cmd)); } static void kill_channel(DBDMA_channel *ch) { - DBDMA_DPRINTF("kill_channel\n"); + DBDMA_DPRINTFCH(ch, "kill_channel\n"); ch->regs[DBDMA_STATUS] |= DEAD; ch->regs[DBDMA_STATUS] &= ~ACTIVE; @@ -114,7 +123,7 @@ static void conditional_interrupt(DBDMA_channel *ch) uint32_t status; int cond; - DBDMA_DPRINTF("%s\n", __func__); + DBDMA_DPRINTFCH(ch, "%s\n", __func__); intr = le16_to_cpu(current->command) & INTR_MASK; @@ -123,7 +132,7 @@ static void conditional_interrupt(DBDMA_channel *ch) return; case INTR_ALWAYS: /* always interrupt */ qemu_irq_raise(ch->irq); - DBDMA_DPRINTF("%s: raise\n", __func__); + DBDMA_DPRINTFCH(ch, "%s: raise\n", __func__); return; } @@ -138,13 +147,13 @@ static void conditional_interrupt(DBDMA_channel *ch) case INTR_IFSET: /* intr if condition bit is 1 */ if (cond) { qemu_irq_raise(ch->irq); - DBDMA_DPRINTF("%s: raise\n", __func__); + DBDMA_DPRINTFCH(ch, "%s: raise\n", __func__); } return; case INTR_IFCLR: /* intr if condition bit is 0 */ if (!cond) { qemu_irq_raise(ch->irq); - DBDMA_DPRINTF("%s: raise\n", __func__); + DBDMA_DPRINTFCH(ch, "%s: raise\n", __func__); } return; } @@ -158,7 +167,7 @@ static int conditional_wait(DBDMA_channel *ch) uint32_t status; int cond; - DBDMA_DPRINTF("conditional_wait\n"); + DBDMA_DPRINTFCH(ch, "conditional_wait\n"); wait = le16_to_cpu(current->command) & WAIT_MASK; @@ -217,7 +226,7 @@ static void conditional_branch(DBDMA_channel *ch) uint32_t status; int cond; - DBDMA_DPRINTF("conditional_branch\n"); + DBDMA_DPRINTFCH(ch, "conditional_branch\n"); /* check if we must branch */ @@ -262,7 +271,7 @@ static void dbdma_end(DBDMA_io *io) DBDMA_channel *ch = io->channel; dbdma_cmd *current = &ch->current; - DBDMA_DPRINTF("%s\n", __func__); + DBDMA_DPRINTFCH(ch, "%s\n", __func__); if (conditional_wait(ch)) goto wait; @@ -288,13 +297,13 @@ wait: static void start_output(DBDMA_channel *ch, int key, uint32_t addr, uint16_t req_count, int is_last) { - DBDMA_DPRINTF("start_output\n"); + DBDMA_DPRINTFCH(ch, "start_output\n"); /* KEY_REGS, KEY_DEVICE and KEY_STREAM * are not implemented in the mac-io chip */ - DBDMA_DPRINTF("addr 0x%x key 0x%x\n", addr, key); + DBDMA_DPRINTFCH(ch, "addr 0x%x key 0x%x\n", addr, key); if (!addr || key > KEY_STREAM3) { kill_channel(ch); return; @@ -314,13 +323,13 @@ static void start_output(DBDMA_channel *ch, int key, uint32_t addr, static void start_input(DBDMA_channel *ch, int key, uint32_t addr, uint16_t req_count, int is_last) { - DBDMA_DPRINTF("start_input\n"); + DBDMA_DPRINTFCH(ch, "start_input\n"); /* KEY_REGS, KEY_DEVICE and KEY_STREAM * are not implemented in the mac-io chip */ - DBDMA_DPRINTF("addr 0x%x key 0x%x\n", addr, key); + DBDMA_DPRINTFCH(ch, "addr 0x%x key 0x%x\n", addr, key); if (!addr || key > KEY_STREAM3) { kill_channel(ch); return; @@ -343,7 +352,7 @@ static void load_word(DBDMA_channel *ch, int key, uint32_t addr, dbdma_cmd *current = &ch->current; uint32_t val; - DBDMA_DPRINTF("load_word\n"); + DBDMA_DPRINTFCH(ch, "load_word\n"); /* only implements KEY_SYSTEM */ @@ -382,7 +391,7 @@ static void store_word(DBDMA_channel *ch, int key, uint32_t addr, dbdma_cmd *current = &ch->current; uint32_t val; - DBDMA_DPRINTF("store_word\n"); + DBDMA_DPRINTFCH(ch, "store_word\n"); /* only implements KEY_SYSTEM */ @@ -445,7 +454,7 @@ static void channel_run(DBDMA_channel *ch) uint16_t req_count; uint32_t phy_addr; - DBDMA_DPRINTF("channel_run\n"); + DBDMA_DPRINTFCH(ch, "channel_run\n"); dump_dbdma_cmd(current); /* clear WAKE flag at command fetch */ @@ -539,9 +548,9 @@ static void DBDMA_run_bh(void *opaque) { DBDMAState *s = opaque; - DBDMA_DPRINTF("DBDMA_run_bh\n"); - + DBDMA_DPRINTF("-> DBDMA_run_bh\n"); DBDMA_run(s); + DBDMA_DPRINTF("<- DBDMA_run_bh\n"); } void DBDMA_kick(DBDMAState *dbdma) @@ -556,7 +565,7 @@ void DBDMA_register_channel(void *dbdma, int nchan, qemu_irq irq, DBDMAState *s = dbdma; DBDMA_channel *ch = &s->channels[nchan]; - DBDMA_DPRINTF("DBDMA_register_channel 0x%x\n", nchan); + DBDMA_DPRINTFCH(ch, "DBDMA_register_channel 0x%x\n", nchan); assert(rw); assert(flush); @@ -600,7 +609,7 @@ dbdma_control_write(DBDMA_channel *ch) status &= ~FLUSH; } - DBDMA_DPRINTF(" status 0x%08x\n", status); + DBDMA_DPRINTFCH(ch, " status 0x%08x\n", status); ch->regs[DBDMA_STATUS] = status; @@ -617,10 +626,10 @@ static void dbdma_write(void *opaque, hwaddr addr, DBDMA_channel *ch = &s->channels[channel]; int reg = (addr - (channel << DBDMA_CHANNEL_SHIFT)) >> 2; - DBDMA_DPRINTF("writel 0x" TARGET_FMT_plx " <= 0x%08"PRIx64"\n", - addr, value); - DBDMA_DPRINTF("channel 0x%x reg 0x%x\n", - (uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg); + DBDMA_DPRINTFCH(ch, "writel 0x" TARGET_FMT_plx " <= 0x%08"PRIx64"\n", + addr, value); + DBDMA_DPRINTFCH(ch, "channel 0x%x reg 0x%x\n", + (uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg); /* cmdptr cannot be modified if channel is ACTIVE */ @@ -671,9 +680,9 @@ static uint64_t dbdma_read(void *opaque, hwaddr addr, value = ch->regs[reg]; - DBDMA_DPRINTF("readl 0x" TARGET_FMT_plx " => 0x%08x\n", addr, value); - DBDMA_DPRINTF("channel 0x%x reg 0x%x\n", - (uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg); + DBDMA_DPRINTFCH(ch, "readl 0x" TARGET_FMT_plx " => 0x%08x\n", addr, value); + DBDMA_DPRINTFCH(ch, "channel 0x%x reg 0x%x\n", + (uint32_t)addr >> DBDMA_CHANNEL_SHIFT, reg); switch(reg) { case DBDMA_CONTROL: