From patchwork Thu Jul 14 16:29:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 9230215 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BEB5F6075D for ; Thu, 14 Jul 2016 16:34:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF75927FB6 for ; Thu, 14 Jul 2016 16:34:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A445C281B7; Thu, 14 Jul 2016 16:34:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3200327FB6 for ; Thu, 14 Jul 2016 16:34:54 +0000 (UTC) Received: from localhost ([::1]:55549 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNjbB-0004tZ-6K for patchwork-qemu-devel@patchwork.kernel.org; Thu, 14 Jul 2016 12:34:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51674) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNjWL-0006ZH-N5 for qemu-devel@nongnu.org; Thu, 14 Jul 2016 12:29:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bNjWK-0002CB-H6 for qemu-devel@nongnu.org; Thu, 14 Jul 2016 12:29:53 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:58290) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNjWK-0002A6-A0 for qemu-devel@nongnu.org; Thu, 14 Jul 2016 12:29:52 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1bNjWG-0000L9-1d for qemu-devel@nongnu.org; Thu, 14 Jul 2016 17:29:48 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 14 Jul 2016 17:29:41 +0100 Message-Id: <1468513783-25449-10-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1468513783-25449-1-git-send-email-peter.maydell@linaro.org> References: <1468513783-25449-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 09/11] ast2400: replace aspeed_smc_is_implemented() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Cédric Le Goater aspeed_smc_is_implemented() filters invalid registers in a peculiar way. Let's remove it and open code the if conditions. It serves the same purpose, the aesthetic is better, and new registers can easily be added. Signed-off-by: Cédric Le Goater Message-id: 1467994016-11678-3-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/ssi/aspeed_smc.c | 35 +++++++++++++++-------------------- 1 file changed, 15 insertions(+), 20 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index a371e30..854474b 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -281,12 +281,6 @@ static void aspeed_smc_reset(DeviceState *d) aspeed_smc_update_cs(s); } -static bool aspeed_smc_is_implemented(AspeedSMCState *s, hwaddr addr) -{ - return (addr == s->r_conf || addr == s->r_timings || addr == s->r_ce_ctrl || - (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs)); -} - static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size) { AspeedSMCState *s = ASPEED_SMC(opaque); @@ -300,13 +294,16 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size) return 0; } - if (!aspeed_smc_is_implemented(s, addr)) { + if (addr == s->r_conf || + addr == s->r_timings || + addr == s->r_ce_ctrl || + (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs)) { + return s->regs[addr]; + } else { qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n", - __func__, addr); + __func__, addr); return 0; } - - return s->regs[addr]; } static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data, @@ -324,20 +321,18 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data, return; } - if (!aspeed_smc_is_implemented(s, addr)) { + if (addr == s->r_conf || + addr == s->r_timings || + addr == s->r_ce_ctrl) { + s->regs[addr] = value; + } else if (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs) { + s->regs[addr] = value; + aspeed_smc_update_cs(s); + } else { qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n", __func__, addr); return; } - - /* - * Not much to do apart from storing the value and set the cs - * lines if the register is a controlling one. - */ - s->regs[addr] = value; - if (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs) { - aspeed_smc_update_cs(s); - } } static const MemoryRegionOps aspeed_smc_ops = {