From patchwork Fri Jul 22 13:00:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 9243539 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ADFD360757 for ; Fri, 22 Jul 2016 13:01:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C37627F9A for ; Fri, 22 Jul 2016 13:01:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E75627FA3; Fri, 22 Jul 2016 13:01:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 881CE27F9A for ; Fri, 22 Jul 2016 13:01:06 +0000 (UTC) Received: from localhost ([::1]:47138 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQa4f-000130-C1 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 22 Jul 2016 09:01:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55926) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQa4K-00012t-AY for qemu-devel@nongnu.org; Fri, 22 Jul 2016 09:00:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQa4G-0002Hx-4J for qemu-devel@nongnu.org; Fri, 22 Jul 2016 09:00:43 -0400 Received: from ssl.serverraum.org ([2a01:4f8:130:84d6::1:2]:57071) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQa4F-0002H1-9L for qemu-devel@nongnu.org; Fri, 22 Jul 2016 09:00:40 -0400 Received: from mwalle01.kse.adk.loc (unknown [194.25.174.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 1625822375; Fri, 22 Jul 2016 15:00:31 +0200 (CEST) Authentication-Results: ssl.serverraum.org; dmarc=none header.from=walle.cc DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1469192432; bh=JrfxXJOvjk+TZdlLui1wYY9iy7gfKr0y/fN5e9HViDQ=; h=From:To:Cc:Subject:Date:From; b=dPqDy2cAZEXJzQn6km41I24U3C2N4fQacAcRQuG+3dIQ22XM/OF2o/zBQ1QkGp+xQ b5cwLDN6icuVjddVx2DnYb7+wZ6GfqAeiS4j+K3IdeDFA9XrcZroTYPgCymQRCAIuG Y2NLnM/ASmlA+vXHm/nxm3QqpCGyptqLKLnMeMjk= From: Michael Walle To: Alexander Graf Date: Fri, 22 Jul 2016 15:00:08 +0200 Message-Id: <1469192408-21713-1-git-send-email-michael@walle.cc> X-Mailer: git-send-email 2.1.4 X-Virus-Scanned: clamav-milter 0.99.2 at web X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a01:4f8:130:84d6::1:2 Subject: [Qemu-devel] [PATCH] target-ppc: set MSR_CM bit for BookE 2.06 MMU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Walle , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP 64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is not set which enables the 64 bit mode for this MMU model. Memory addresses are truncated to 32 bit, which results in "Invalid data memory access" error messages. Fix it by setting the MSR_CM bit for this MMU model. Signed-off-by: Michael Walle --- target-ppc/translate_init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5ecafc7..1ebb143 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -10218,6 +10218,9 @@ static void ppc_cpu_reset(CPUState *s) if (env->mmu_model & POWERPC_MMU_64) { msr |= (1ULL << MSR_SF); } + if (env->mmu_model == POWERPC_MMU_BOOKE206) { + msr |= (1ULL << MSR_CM); + } #endif hreg_store_msr(env, msr, 1);