From patchwork Tue Jul 26 22:21:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 9249077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1E5C060757 for ; Tue, 26 Jul 2016 22:43:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1003A26B41 for ; Tue, 26 Jul 2016 22:43:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 04DD6272AA; Tue, 26 Jul 2016 22:43:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8ABEB26B41 for ; Tue, 26 Jul 2016 22:43:00 +0000 (UTC) Received: from localhost ([::1]:42758 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSB3z-00036K-M0 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 26 Jul 2016 18:42:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49909) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSAkv-0001fJ-P8 for qemu-devel@nongnu.org; Tue, 26 Jul 2016 18:23:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bSAkt-0000Vw-LN for qemu-devel@nongnu.org; Tue, 26 Jul 2016 18:23:16 -0400 Received: from gate.crashing.org ([63.228.1.57]:47465) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSAkt-0000Vm-CI; Tue, 26 Jul 2016 18:23:15 -0400 Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id u6QMLwGD007480; Tue, 26 Jul 2016 17:22:54 -0500 From: Benjamin Herrenschmidt To: qemu-ppc@nongnu.org Date: Wed, 27 Jul 2016 08:21:13 +1000 Message-Id: <1469571686-7284-19-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1469571686-7284-1-git-send-email-benh@kernel.crashing.org> References: <1469571686-7284-1-git-send-email-benh@kernel.crashing.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 63.228.1.57 Subject: [Qemu-devel] [PATCH 19/32] ppc: Don't update NIP in facility unavailable interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is no longer necessary as the helpers will properly retrieve the return address when needed. Also remove gen_update_current_nip() which didn't seem to make much sense to me. Signed-off-by: Benjamin Herrenschmidt --- target-ppc/cpu.h | 1 - target-ppc/misc_helper.c | 9 +++++---- target-ppc/translate.c | 7 ------- target-ppc/translate_init.c | 2 -- 4 files changed, 5 insertions(+), 14 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 2ee7a5e..0786738 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1201,7 +1201,6 @@ extern const struct VMStateDescription vmstate_ppc_cpu; /*****************************************************************************/ PowerPCCPU *cpu_ppc_init(const char *cpu_model); void ppc_translate_init(void); -void gen_update_current_nip(void *opaque); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c index cb5ebf5..1e6e705 100644 --- a/target-ppc/misc_helper.c +++ b/target-ppc/misc_helper.c @@ -39,7 +39,8 @@ void helper_store_dump_spr(CPUPPCState *env, uint32_t sprn) #ifdef TARGET_PPC64 static void raise_fu_exception(CPUPPCState *env, uint32_t bit, - uint32_t sprn, uint32_t cause) + uint32_t sprn, uint32_t cause, + uintptr_t raddr) { qemu_log("Facility SPR %d is unavailable (SPR FSCR:%d)\n", sprn, bit); @@ -47,7 +48,7 @@ static void raise_fu_exception(CPUPPCState *env, uint32_t bit, cause &= FSCR_IC_MASK; env->spr[SPR_FSCR] |= (target_ulong)cause << FSCR_IC_POS; - helper_raise_exception_err(env, POWERPC_EXCP_FU, 0); + raise_exception_err_ra(env, POWERPC_EXCP_FU, 0, raddr); } #endif @@ -59,7 +60,7 @@ void helper_fscr_facility_check(CPUPPCState *env, uint32_t bit, /* Facility is enabled, continue */ return; } - raise_fu_exception(env, bit, sprn, cause); + raise_fu_exception(env, bit, sprn, cause, GETPC()); #endif } @@ -71,7 +72,7 @@ void helper_msr_facility_check(CPUPPCState *env, uint32_t bit, /* Facility is enabled, continue */ return; } - raise_fu_exception(env, bit, sprn, cause); + raise_fu_exception(env, bit, sprn, cause, GETPC()); #endif } diff --git a/target-ppc/translate.c b/target-ppc/translate.c index f0e0ec6..4577788 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -266,13 +266,6 @@ static inline void gen_update_nip(DisasContext *ctx, target_ulong nip) tcg_gen_movi_tl(cpu_nip, nip); } -void gen_update_current_nip(void *opaque) -{ - DisasContext *ctx = opaque; - - tcg_gen_movi_tl(cpu_nip, ctx->nip); -} - static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) { TCGv_i32 t0, t1; diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5ecafc7..74b1b33 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7469,7 +7469,6 @@ static void gen_fscr_facility_check(DisasContext *ctx, int facility_sprn, TCGv_i32 t2 = tcg_const_i32(sprn); TCGv_i32 t3 = tcg_const_i32(cause); - gen_update_current_nip(ctx); gen_helper_fscr_facility_check(cpu_env, t1, t2, t3); tcg_temp_free_i32(t3); @@ -7484,7 +7483,6 @@ static void gen_msr_facility_check(DisasContext *ctx, int facility_sprn, TCGv_i32 t2 = tcg_const_i32(sprn); TCGv_i32 t3 = tcg_const_i32(cause); - gen_update_current_nip(ctx); gen_helper_msr_facility_check(cpu_env, t1, t2, t3); tcg_temp_free_i32(t3);