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Violators will be prosecuted; Mon, 8 Aug 2016 03:37:14 +1000 X-IBM-Helo: d23dlp02.au.ibm.com X-IBM-MailFrom: nikunj@linux.vnet.ibm.com X-IBM-RcptTo: qemu-devel@nongnu.org;qemu-ppc@nongnu.org Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 6A89F2BB0055; Mon, 8 Aug 2016 03:37:14 +1000 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u77HbElH29425752; Mon, 8 Aug 2016 03:37:14 +1000 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u77HbDvu020758; Mon, 8 Aug 2016 03:37:14 +1000 Received: from abhimanyu.in.ibm.com ([9.124.218.68]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u77Hax58020568; Mon, 8 Aug 2016 03:37:12 +1000 From: Nikunj A Dadhania To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Date: Sun, 7 Aug 2016 23:06:55 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1470591415-3268-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1470591415-3268-1-git-send-email-nikunj@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16080717-0040-0000-0000-000001CA030B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16080717-0041-0000-0000-00000A38F367 Message-Id: <1470591415-3268-7-git-send-email-nikunj@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-08-07_10:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=2 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1608070208 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 6/6] target-ppc: add stxvb16x and stxvh8x X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP stxvb16x: Store VSX Vector Byte*16 stxvh8x: Store VSX Vector Halfword*8 Signed-off-by: Nikunj A Dadhania --- target-ppc/helper.h | 2 ++ target-ppc/mem_helper.c | 32 ++++++++++++++++++++++++++++++++ target-ppc/translate/vsx-impl.inc.c | 20 ++++++++++++++++++++ target-ppc/translate/vsx-ops.inc.c | 2 ++ 4 files changed, 56 insertions(+) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 2fe93ae..4e73836 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -292,6 +292,8 @@ DEF_HELPER_2(lxvh8x, i64, env, tl) DEF_HELPER_3(stvebx, void, env, avr, tl) DEF_HELPER_3(stvehx, void, env, avr, tl) DEF_HELPER_3(stvewx, void, env, avr, tl) +DEF_HELPER_3(stxvb16x, void, env, i64, tl) +DEF_HELPER_3(stxvh8x, void, env, i64, tl) DEF_HELPER_4(vsumsws, void, env, avr, avr, avr) DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr) DEF_HELPER_4(vsum4sbs, void, env, avr, avr, avr) diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c index cf32f73..a7a920c 100644 --- a/target-ppc/mem_helper.c +++ b/target-ppc/mem_helper.c @@ -359,6 +359,38 @@ LXV(lxvh8x, cpu_lduw_data_ra, bswap16, uint16_t, 4) #undef I #undef LXV +#define STXV(name, access, swap, type, elems) \ +void helper_##name(CPUPPCState *env, uint64_t vsr, \ + target_ulong addr) \ +{ \ + type *r; \ + int i, index, bound, step; \ + if (msr_le) { \ + index = elems - 1; \ + bound = -1; \ + step = -1; \ + } else { \ + index = 0; \ + bound = elems; \ + step = 1; \ + } \ + r = (type *) &vsr; \ + for (i = index; i != bound; i += step) { \ + if (needs_byteswap(env)) { \ + access(env, addr, swap(r[i]), GETPC()); \ + } else { \ + access(env, addr, r[i], GETPC()); \ + } \ + addr = addr_add(env, addr, sizeof(type)); \ + } \ +} + +#define I(x) (x) +STXV(stxvb16x, cpu_stb_data_ra, I, uint8_t, 8) +STXV(stxvh8x, cpu_stw_data_ra, bswap16, uint16_t, 4) +#undef I +#undef STXV + #define STVE(name, access, swap, element) \ void helper_##name(CPUPPCState *env, ppc_avr_t *r, \ target_ulong addr) \ diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c index 0c3a0dd..f82ee59 100644 --- a/target-ppc/translate/vsx-impl.inc.c +++ b/target-ppc/translate/vsx-impl.inc.c @@ -122,6 +122,26 @@ static void gen_##name(DisasContext *ctx) \ VSX_LOAD_VECTOR(lxvb16x) VSX_LOAD_VECTOR(lxvh8x) +#define VSX_STORE_VECTOR(name) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + TCGv EA; \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + gen_set_access_type(ctx, ACCESS_INT); \ + EA = tcg_temp_new(); \ + gen_addr_reg_index(ctx, EA); \ + gen_helper_##name(cpu_env, cpu_vsrh(xT(ctx->opcode)), EA); \ + tcg_gen_addi_tl(EA, EA, 8); \ + gen_helper_##name(cpu_env, cpu_vsrl(xT(ctx->opcode)), EA); \ + tcg_temp_free(EA); \ +} + +VSX_STORE_VECTOR(stxvb16x) +VSX_STORE_VECTOR(stxvh8x) + #define VSX_STORE_SCALAR(name, operation) \ static void gen_##name(DisasContext *ctx) \ { \ diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c index 598b349..f5afa0f 100644 --- a/target-ppc/translate/vsx-ops.inc.c +++ b/target-ppc/translate/vsx-ops.inc.c @@ -17,6 +17,8 @@ GEN_HANDLER_E(stxsiwx, 0x1F, 0xC, 0x04, 0, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(stxsspx, 0x1F, 0xC, 0x14, 0, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX), +GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),