From patchwork Tue Aug 23 09:27:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cao jin X-Patchwork-Id: 9295329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7EB5060757 for ; Tue, 23 Aug 2016 09:24:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64002284A3 for ; Tue, 23 Aug 2016 09:24:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5685E28BBC; Tue, 23 Aug 2016 09:24:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DCE3E284A3 for ; Tue, 23 Aug 2016 09:24:02 +0000 (UTC) Received: from localhost ([::1]:45489 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bc7wA-0004PO-1l for patchwork-qemu-devel@patchwork.kernel.org; Tue, 23 Aug 2016 05:24:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56636) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bc7ra-0000Z8-HS for qemu-devel@nongnu.org; Tue, 23 Aug 2016 05:19:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bc7rU-00077F-Tp for qemu-devel@nongnu.org; Tue, 23 Aug 2016 05:19:17 -0400 Received: from [59.151.112.132] (port=10901 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bc7rU-00073H-Ew for qemu-devel@nongnu.org; Tue, 23 Aug 2016 05:19:12 -0400 X-IronPort-AV: E=Sophos;i="5.22,518,1449504000"; d="scan'208";a="10186534" Received: from unknown (HELO cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 23 Aug 2016 17:19:01 +0800 Received: from G08CNEXCHPEKD03.g08.fujitsu.local (unknown [10.167.33.85]) by cn.fujitsu.com (Postfix) with ESMTP id 95CD742EB228; Tue, 23 Aug 2016 17:18:55 +0800 (CST) Received: from G08FNSTD140223.g08.fujitsu.local (10.167.226.69) by G08CNEXCHPEKD03.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.279.2; Tue, 23 Aug 2016 17:18:53 +0800 From: Cao jin To: Date: Tue, 23 Aug 2016 17:27:30 +0800 Message-ID: <1471944454-13895-2-git-send-email-caoj.fnst@cn.fujitsu.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1471944454-13895-1-git-send-email-caoj.fnst@cn.fujitsu.com> References: <1471944454-13895-1-git-send-email-caoj.fnst@cn.fujitsu.com> MIME-Version: 1.0 X-Originating-IP: [10.167.226.69] X-yoursite-MailScanner-ID: 95CD742EB228.AB7B5 X-yoursite-MailScanner: Found to be clean X-yoursite-MailScanner-From: caoj.fnst@cn.fujitsu.com X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 59.151.112.132 Subject: [Qemu-devel] [PATCH v2 1/5] msix_init: assert programming error X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Markus Armbruster , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The input parameters is used for creating the msix capable device, so they must obey the PCI spec, or else, it should be programming error. CC: Markus Armbruster CC: Marcel Apfelbaum CC: Michael S. Tsirkin Signed-off-by: Cao jin --- hw/pci/msix.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 0ec1cb1..384a29d 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -253,9 +253,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries, return -ENOTSUP; } - if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1) { - return -EINVAL; - } + assert(nentries >= 1 && nentries <= PCI_MSIX_FLAGS_QSIZE + 1); table_size = nentries * PCI_MSIX_ENTRY_SIZE; pba_size = QEMU_ALIGN_UP(nentries, 64) / 8; @@ -266,7 +264,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries, table_offset + table_size > memory_region_size(table_bar) || pba_offset + pba_size > memory_region_size(pba_bar) || (table_offset | pba_offset) & PCI_MSIX_FLAGS_BIRMASK) { - return -EINVAL; + assert(0); } cap = pci_add_capability(dev, PCI_CAP_ID_MSIX, cap_pos, MSIX_CAP_LENGTH);