From patchwork Mon Aug 29 22:36:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Yurovsky X-Patchwork-Id: 9304699 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 68581607F0 for ; Tue, 30 Aug 2016 01:00:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42A1028A1A for ; Tue, 30 Aug 2016 01:00:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3606D28A21; Tue, 30 Aug 2016 01:00:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B37EC28A0E for ; Tue, 30 Aug 2016 01:00:19 +0000 (UTC) Received: from localhost ([::1]:46385 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1beXPV-0006KD-Nd for patchwork-qemu-devel@patchwork.kernel.org; Mon, 29 Aug 2016 21:00:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54286) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1beVAh-0007X3-Cj for qemu-devel@nongnu.org; Mon, 29 Aug 2016 18:36:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1beVAe-0002YG-57 for qemu-devel@nongnu.org; Mon, 29 Aug 2016 18:36:51 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:35189) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1beVAd-0002YC-UF for qemu-devel@nongnu.org; Mon, 29 Aug 2016 18:36:48 -0400 Received: by mail-pf0-x242.google.com with SMTP id h186so84124pfg.2 for ; Mon, 29 Aug 2016 15:36:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=XAXU7kRfgRD4PlaQ9UQvlkoGHNXqzxmg5N+WaEEPfMw=; b=ghXGE0jCSYbaa59LJbMwO2ST4aOT8pkN0MxoRQWPlTcAze4PtLtDGax1GMx7Yif0VK UW0qhwaPjDGnuaU5QJV932VxQ+NxBbdK823BEuXddFKPVLQkmMWGPgcEwQ+OIZRod4DF kjXnZJygf7ZKpUrONam1IkYbf4GBGkmn2QYuRBuZVdjGTYu8N1yknkW/hEUfMqb8KHhR C4PnczYyyI4qDjV7JVM+FAgnbZR9SSfUrAROtUVL7aIFJ/Lmvr/Dp/VzYU6bj4rnSZxk 1+8Qn75V85F/iah7vrP0dbMbKH5F7kcM2Kr2Dnm+A5Nycihaoq4778rStT/8FOyMRtjD IeTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=XAXU7kRfgRD4PlaQ9UQvlkoGHNXqzxmg5N+WaEEPfMw=; b=P/67HQM0wT32+vvzfLMbH5GI469ARafqFdjuIaVJmXXnVMGQZKcNQQoMOtcADXb/9D g4a4g42Rf/5t8dREd7573/L10XhJwQMM4U4/UKsSBXXpfIYoAdU/Jg3h24xxS3nNy9uh kHbu6w/yHsynTp4B/VURri1DzaPYLoWyXQNLMZ2cUGs1ItIE/ydn4WnIsD3GnDKUjoYO YxX1PM0lthH7rkdxuY7PjsAlzYp/z9hZMjCjJB5NnXMGlnxguUK28gqEhz0PiOxt0QC5 NaMTtOTALhbdXiDPWNdrZsWx2XVL3eoSR7GHXfRQSHSSWZAq1h5kcWMafurCAJKezZqS nWpQ== X-Gm-Message-State: AE9vXwPb8PjRuFtQNqfF/I5JRQqw4EunfUlzM6CtMD451yDLtD7YaHwC/WW+ak3varVFtQ== X-Received: by 10.98.62.144 with SMTP id y16mr645151pfj.9.1472510206893; Mon, 29 Aug 2016 15:36:46 -0700 (PDT) Received: from silver.impinj.com ([216.243.31.162]) by smtp.gmail.com with ESMTPSA id p187sm51589251pfb.5.2016.08.29.15.36.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Aug 2016 15:36:46 -0700 (PDT) From: Andrey Yurovsky X-Google-Original-From: Andrey Yurovsky To: qemu-devel@nongnu.org Date: Mon, 29 Aug 2016 15:36:41 -0700 Message-Id: <1472510201-4460-1-git-send-email-ayurovsky@silver.impinj.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::242 X-Mailman-Approved-At: Mon, 29 Aug 2016 20:59:51 -0400 Subject: [Qemu-devel] [PATCH] arm: add Cortex A7 CPU parameters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Andrey Yurovsky Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Andrey Yurovsky Add the "cortex-a7" CPU with features and registers matching the Cortex-A7 MPCore Technical Reference Manual and the Cortex-A7 Floating-Point Unit Technical Reference Manual. The A7 is very similar to the A15. Tested via the "virt" machine. Signed-off-by: Andrey Yurovsky --- target-arm/cpu.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index ce8b8f4..c2352da 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -1129,6 +1129,51 @@ static const ARMCPRegInfo cortexa15_cp_reginfo[] = { REGINFO_SENTINEL }; +static void cortex_a7_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + + cpu->dtb_compatible = "arm,cortex-a7"; + set_feature(&cpu->env, ARM_FEATURE_V7); + set_feature(&cpu->env, ARM_FEATURE_VFP4); + set_feature(&cpu->env, ARM_FEATURE_NEON); + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); + set_feature(&cpu->env, ARM_FEATURE_ARM_DIV); + set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); + set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); + set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); + set_feature(&cpu->env, ARM_FEATURE_LPAE); + set_feature(&cpu->env, ARM_FEATURE_EL3); + cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; + cpu->midr = 0x410fc075; + cpu->reset_fpsid = 0x41023075; + cpu->mvfr0 = 0x10110221; + cpu->mvfr1 = 0x11000011; + cpu->ctr = 0x84448003; + cpu->reset_sctlr = 0x00c50078; + cpu->id_pfr0 = 0x00001131; + cpu->id_pfr1 = 0x00011011; + cpu->id_dfr0 = 0x02010555; + cpu->pmceid0 = 0x3fff0f3f; + cpu->pmceid1 = 0x00000000; + cpu->id_afr0 = 0x00000000; + cpu->id_mmfr0 = 0x10101105; + cpu->id_mmfr1 = 0x40000000; + cpu->id_mmfr2 = 0x01240000; + cpu->id_mmfr3 = 0x02102211; + cpu->id_isar0 = 0x01101110; + cpu->id_isar1 = 0x13112111; + cpu->id_isar2 = 0x21232041; + cpu->id_isar3 = 0x11112131; + cpu->id_isar4 = 0x10011142; + cpu->dbgdidr = 0x3515f005; + cpu->clidr = 0x0a200023; + cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ + cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ + cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ + define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */ +} + static void cortex_a15_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1385,6 +1430,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "cortex-m4", .initfn = cortex_m4_initfn, .class_init = arm_v7m_class_init }, { .name = "cortex-r5", .initfn = cortex_r5_initfn }, + { .name = "cortex-a7", .initfn = cortex_a7_initfn }, { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, { .name = "cortex-a15", .initfn = cortex_a15_initfn },