From patchwork Tue Sep 6 03:42:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 9315665 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6681060760 for ; Tue, 6 Sep 2016 05:22:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 57CE228B34 for ; Tue, 6 Sep 2016 05:22:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4C6A328B41; Tue, 6 Sep 2016 05:22:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C2F7628B34 for ; Tue, 6 Sep 2016 05:22:46 +0000 (UTC) Received: from localhost ([::1]:58718 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bh8qL-0006cC-Tw for patchwork-qemu-devel@patchwork.kernel.org; Tue, 06 Sep 2016 01:22:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49683) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bh7GC-0002xS-Bl for qemu-devel@nongnu.org; Mon, 05 Sep 2016 23:41:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bh7G8-0007lk-0c for qemu-devel@nongnu.org; Mon, 05 Sep 2016 23:41:20 -0400 Received: from ozlabs.org ([103.22.144.67]:55756) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bh7G7-0007l2-Lt; Mon, 05 Sep 2016 23:41:15 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3sSsp20Q5gz9sCg; Tue, 6 Sep 2016 13:41:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1473133274; bh=ebV0pLZ5NA+TXsciTDsdevATqmYAgq8mIJB8KwerY/U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K+QQNbZCIYcB1bXqljdzR67DuMsxlID4/X5qmTeWgYX0AWFEwm02cz/VAgjxhXbdh 76v4oD0VxNtXKz+d+uKfv29X+rSnyMQynwkKN63R7h0E82OcnHelLeQIkKxgvISZYo NDqWp2PdByL2D5xTrS3UzCXsFHwVen2ctQzHH5fQ= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 6 Sep 2016 13:42:22 +1000 Message-Id: <1473133396-18940-13-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473133396-18940-1-git-send-email-david@gibson.dropbear.id.au> References: <1473133396-18940-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 12/66] target-ppc: add setb instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nikunj A Dadhania , agraf@suse.de, qemu-devel@nongnu.org, Vivek Andrew Sha , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Vivek Andrew Sha The CR number is provided in the opcode as - BFA (11:13) Returns: -1 if bit 0 of CR field is set 1 if bit 1 of CR field is set 0 otherwise. Signed-off-by: Vivek Andrew Sha [ reworded commit, used 32bit ops as crf is 32bits ] Signed-off-by: Nikunj A Dadhania Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- target-ppc/translate.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index dd2ce58..1384fb7 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -4867,6 +4867,27 @@ static void gen_mtspr(DisasContext *ctx) } } +#if defined(TARGET_PPC64) +/* setb */ +static void gen_setb(DisasContext *ctx) +{ + TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t8 = tcg_temp_new_i32(); + TCGv_i32 tm1 = tcg_temp_new_i32(); + int crf = crfS(ctx->opcode); + + tcg_gen_setcondi_i32(TCG_COND_GEU, t0, cpu_crf[crf], 4); + tcg_gen_movi_i32(t8, 8); + tcg_gen_movi_i32(tm1, -1); + tcg_gen_movcond_i32(TCG_COND_GEU, t0, cpu_crf[crf], t8, tm1, t0); + tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); + + tcg_temp_free_i32(t0); + tcg_temp_free_i32(t8); + tcg_temp_free_i32(tm1); +} +#endif + /*** Cache management ***/ /* dcbf */ @@ -10185,6 +10206,7 @@ GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB), GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC), #if defined(TARGET_PPC64) GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B), +GEN_HANDLER_E(setb, 0x1F, 0x00, 0x04, 0x0003F801, PPC_NONE, PPC2_ISA300), #endif GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001EF801, PPC_MISC), GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000000, PPC_MISC),