From patchwork Tue Sep 6 18:07:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Yurovsky X-Patchwork-Id: 9317765 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2956B607D3 for ; Tue, 6 Sep 2016 18:07:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2530F28E2D for ; Tue, 6 Sep 2016 18:07:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 199D428E3E; Tue, 6 Sep 2016 18:07:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9FC1A28E2D for ; Tue, 6 Sep 2016 18:07:52 +0000 (UTC) Received: from localhost ([::1]:35376 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhKml-0005xc-8z for patchwork-qemu-devel@patchwork.kernel.org; Tue, 06 Sep 2016 14:07:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60974) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhKmW-0005xX-Rg for qemu-devel@nongnu.org; Tue, 06 Sep 2016 14:07:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bhKmT-00010i-HS for qemu-devel@nongnu.org; Tue, 06 Sep 2016 14:07:36 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:33410) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhKmT-00010e-Ai for qemu-devel@nongnu.org; Tue, 06 Sep 2016 14:07:33 -0400 Received: by mail-pf0-x243.google.com with SMTP id 128so395463pfb.0 for ; Tue, 06 Sep 2016 11:07:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sBgM6P1DbFuw0UXIaV1BSv9V+9OuqdRqq1i73y5pcwQ=; b=c4XqU7Nugp5IKcEMTqQzu6Y21gPmFGDsmWFJ1a0lukFNNjl/7ortK0Q364K5UXf+ei g0Aihk92mZ4h3Ob8KB5f4AGYNSwHHY9Y3jd4FDGsyhoroMPl3/ZYWHiQeooc6GgOnzjr 8TtpIgsZfwQXozcAN75dSxKEczcBn15VjJz2as+IHongiOuMlOXU50Q94+z5eTSbxGN/ f/+Tpri5JBNSzXWWCb/npTKsw8fKYxQkLvjXdwHsVDAao0ZsLR6tVepRnmMY5wwGlh6+ H2AiWZQe2iv7wqAwj6fcgP19w5+QGSz5154gbXiXO8ayFYGRxwM5d1ZrGWG7RZJMAdut MQSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sBgM6P1DbFuw0UXIaV1BSv9V+9OuqdRqq1i73y5pcwQ=; b=mpgRgWYWgZltUa+xulNR4QIvJ2zwwmbqzX3g6rBmFo1WUj8zY9Yi0db+RSngHD5WsU zgYh5kXdsk4fUNu4pwMR9sSABzMQs1M9+yR3Yg2rIWDtIGKzTznTib8grOi0R5clLqfG MwgoR0xAFyE/Zq5IBNBrp0MxrjxAWffXbRt5FX011qmhiRKossyJxTp/bVa/RSq3FbKy 9N7gu68uS8GdQtF1wADn05dXmNMLQmShqr2vj3ypch/Zefd78bgv4CFYI8TB9aYI/7H/ makxA4HgTDR9+UHI4zZ3e1XJwAHJfLd5FPX0XnO4RbU/fytP3vRgBMhFyRjpGxUQt7FO njkw== X-Gm-Message-State: AE9vXwPIHS+/ctzXWFxBgdZyb/Db1BQTKd2TC5sw8/nexpP1o78rzGnMZpjFYoVWJiC19g== X-Received: by 10.98.31.219 with SMTP id l88mr74934701pfj.155.1473185252240; Tue, 06 Sep 2016 11:07:32 -0700 (PDT) Received: from silver.impinj.com ([216.243.31.162]) by smtp.gmail.com with ESMTPSA id us6sm42725456pac.20.2016.09.06.11.07.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Sep 2016 11:07:31 -0700 (PDT) From: Andrey Yurovsky To: qemu-devel@nongnu.org Date: Tue, 6 Sep 2016 11:07:09 -0700 Message-Id: <1473185229-4597-1-git-send-email-yurovsky@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH] arm: add Cortex A7 CPU parameters X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Andrey Yurovsky Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the "cortex-a7" CPU with features and registers matching the Cortex-A7 MPCore Technical Reference Manual and the Cortex-A7 Floating-Point Unit Technical Reference Manual. The A7 is very similar to the A15. Signed-off-by: Andrey Yurovsky Reviewed-by: Peter Maydell --- target-arm/cpu.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index ce8b8f4..1b9540e 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -1129,6 +1129,51 @@ static const ARMCPRegInfo cortexa15_cp_reginfo[] = { REGINFO_SENTINEL }; +static void cortex_a7_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + + cpu->dtb_compatible = "arm,cortex-a7"; + set_feature(&cpu->env, ARM_FEATURE_V7); + set_feature(&cpu->env, ARM_FEATURE_VFP4); + set_feature(&cpu->env, ARM_FEATURE_NEON); + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); + set_feature(&cpu->env, ARM_FEATURE_ARM_DIV); + set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); + set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); + set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); + set_feature(&cpu->env, ARM_FEATURE_LPAE); + set_feature(&cpu->env, ARM_FEATURE_EL3); + cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; + cpu->midr = 0x410fc075; + cpu->reset_fpsid = 0x41023075; + cpu->mvfr0 = 0x10110222; + cpu->mvfr1 = 0x11111111; + cpu->ctr = 0x84448003; + cpu->reset_sctlr = 0x00c50078; + cpu->id_pfr0 = 0x00001131; + cpu->id_pfr1 = 0x00011011; + cpu->id_dfr0 = 0x02010555; + cpu->pmceid0 = 0x00000000; + cpu->pmceid1 = 0x00000000; + cpu->id_afr0 = 0x00000000; + cpu->id_mmfr0 = 0x10101105; + cpu->id_mmfr1 = 0x40000000; + cpu->id_mmfr2 = 0x01240000; + cpu->id_mmfr3 = 0x02102211; + cpu->id_isar0 = 0x01101110; + cpu->id_isar1 = 0x13112111; + cpu->id_isar2 = 0x21232041; + cpu->id_isar3 = 0x11112131; + cpu->id_isar4 = 0x10011142; + cpu->dbgdidr = 0x3515f005; + cpu->clidr = 0x0a200023; + cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ + cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ + cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ + define_arm_cp_regs(cpu, cortexa15_cp_reginfo); /* Same as A15 */ +} + static void cortex_a15_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -1385,6 +1430,7 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "cortex-m4", .initfn = cortex_m4_initfn, .class_init = arm_v7m_class_init }, { .name = "cortex-r5", .initfn = cortex_r5_initfn }, + { .name = "cortex-a7", .initfn = cortex_a7_initfn }, { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, { .name = "cortex-a15", .initfn = cortex_a15_initfn },