From patchwork Wed Sep 7 10:28:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 9318859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C7684607D3 for ; Wed, 7 Sep 2016 10:33:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C864A2921A for ; Wed, 7 Sep 2016 10:33:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BB7B12921D; Wed, 7 Sep 2016 10:33:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4BD702921A for ; Wed, 7 Sep 2016 10:33:52 +0000 (UTC) Received: from localhost ([::1]:39376 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhaAx-00081o-Ro for patchwork-qemu-devel@patchwork.kernel.org; Wed, 07 Sep 2016 06:33:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33331) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bha5c-0002ah-DA for qemu-devel@nongnu.org; Wed, 07 Sep 2016 06:28:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bha5X-0004b0-1X for qemu-devel@nongnu.org; Wed, 07 Sep 2016 06:28:19 -0400 Received: from ozlabs.org ([103.22.144.67]:33804) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bha5W-0004aG-MX; Wed, 07 Sep 2016 06:28:14 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3sTfn71Fkqz9sD5; Wed, 7 Sep 2016 20:28:10 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1473244091; bh=Hclv3cVN2yVYXEkGXQccFVfInlJwkubzHeXyEJWgb0o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IZ9W5kDrsqqsL30dVjvvkNyDthP/TLu/BQz6sNTMRNwU+yBwE/0IX6hpOVG3Nb7c7 AfgawPTbI3m4h0rQgLbvIXY4Q9okai4Fqs3AHUd/7egrvZrGNTGAfUCV9ymXNhtJPF nMUoIf8aTb0brKskBmsDlW9MGUIJNNdtDwPl+rS4= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 7 Sep 2016 20:28:47 +1000 Message-Id: <1473244183-31510-9-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473244183-31510-1-git-send-email-david@gibson.dropbear.id.au> References: <1473244183-31510-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 08/64] target-ppc: add modulo dword operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, Nikunj A Dadhania , agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Nikunj A Dadhania Adding following instructions for ISA3.0 support modud: Modulo Unsigned Dword modsd: Modulo Signed Dword Signed-off-by: Nikunj A Dadhania Reviewed-by: Richard Henderson --- target-ppc/translate.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e3d9ac3..90aabb5 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1222,6 +1222,52 @@ static void glue(gen_, name)(DisasContext *ctx) \ GEN_INT_ARITH_MODW(moduw, 0x08, 0); GEN_INT_ARITH_MODW(modsw, 0x18, 1); +#if defined(TARGET_PPC64) +static inline void gen_op_arith_modd(DisasContext *ctx, TCGv ret, TCGv arg1, + TCGv arg2, int sign) +{ + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + + tcg_gen_mov_i64(t0, arg1); + tcg_gen_mov_i64(t1, arg2); + if (sign) { + TCGv_i64 t2 = tcg_temp_new_i64(); + TCGv_i64 t3 = tcg_temp_new_i64(); + tcg_gen_setcondi_i64(TCG_COND_EQ, t2, t0, INT64_MIN); + tcg_gen_setcondi_i64(TCG_COND_EQ, t3, t1, -1); + tcg_gen_and_i64(t2, t2, t3); + tcg_gen_setcondi_i64(TCG_COND_EQ, t3, t1, 0); + tcg_gen_or_i64(t2, t2, t3); + tcg_gen_movi_i64(t3, 0); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_rem_i64(ret, t0, t1); + tcg_temp_free_i64(t2); + tcg_temp_free_i64(t3); + } else { + TCGv_i64 t2 = tcg_const_i64(1); + TCGv_i64 t3 = tcg_const_i64(0); + tcg_gen_movcond_i64(TCG_COND_EQ, t1, t1, t3, t2, t1); + tcg_gen_remu_i64(ret, t0, t1); + tcg_temp_free_i64(t2); + tcg_temp_free_i64(t3); + } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); +} + +#define GEN_INT_ARITH_MODD(name, opc3, sign) \ +static void glue(gen_, name)(DisasContext *ctx) \ +{ \ + gen_op_arith_modd(ctx, cpu_gpr[rD(ctx->opcode)], \ + cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ + sign); \ +} + +GEN_INT_ARITH_MODD(modud, 0x08, 0); +GEN_INT_ARITH_MODD(modsd, 0x18, 1); +#endif + /* mulhw mulhw. */ static void gen_mulhw(DisasContext *ctx) { @@ -10304,6 +10350,8 @@ GEN_HANDLER_E(divdeu, 0x1F, 0x09, 0x0C, 0, PPC_NONE, PPC2_DIVE_ISA206), GEN_HANDLER_E(divdeuo, 0x1F, 0x09, 0x1C, 0, PPC_NONE, PPC2_DIVE_ISA206), GEN_HANDLER_E(divde, 0x1F, 0x09, 0x0D, 0, PPC_NONE, PPC2_DIVE_ISA206), GEN_HANDLER_E(divdeo, 0x1F, 0x09, 0x1D, 0, PPC_NONE, PPC2_DIVE_ISA206), +GEN_HANDLER_E(modsd, 0x1F, 0x09, 0x18, 0x00000001, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(modud, 0x1F, 0x09, 0x08, 0x00000001, PPC_NONE, PPC2_ISA300), #undef GEN_INT_ARITH_MUL_HELPER #define GEN_INT_ARITH_MUL_HELPER(name, opc3) \