diff mbox

target-mips: generate fences

Message ID 1473319513-10742-1-git-send-email-leon.alrae@imgtec.com (mailing list archive)
State New, archived
Headers show

Commit Message

Leon Alrae Sept. 8, 2016, 7:25 a.m. UTC 
Make use of memory barrier TCG opcode in MIPS front end.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
This patch complements the following series:
https://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg03283.html
---
 target-mips/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Richard Henderson Sept. 8, 2016, 4:47 p.m. UTC | #1 
On 09/08/2016 12:25 AM, Leon Alrae wrote:
> Make use of memory barrier TCG opcode in MIPS front end.
> 
> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
> ---
> This patch complements the following series:
> https://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg03283.html
> ---
>  target-mips/translate.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>

I've sent a pull request that includes the barrier code.
You should be able to include this in your next mips pull.


r~
diff mbox

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index c212e4f..f4513bf 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -13384,7 +13384,7 @@  static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
     case 0x2d:
         switch (minor) {
         case SYNC:
-            /* NOP */
+            tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
             break;
         case SYSCALL:
             generate_exception_end(ctx, EXCP_SYSCALL);
@@ -17201,7 +17201,7 @@  static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
         break;
     case OPC_SYNC:
         check_insn(ctx, ISA_MIPS2);
-        /* Treat as NOP. */
+        tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
         break;
 
 #if defined(TARGET_MIPS64)