diff mbox

[RFC,v2,15/16] target-i386: add cpuid Fn8000_001f

Message ID 147455606495.8519.8676724837911334309.stgit@brijesh-build-machine (mailing list archive)
State New, archived
Headers show

Commit Message

Brijesh Singh Sept. 22, 2016, 2:54 p.m. UTC 
Fn8000_001f cpuid provides the memory encryption (aka C-bit)

Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
 target-i386/cpu.c |   10 ++++++++++
 1 file changed, 10 insertions(+)
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Patch

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6a1afab..43e698b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -22,6 +22,7 @@ 
 #include "cpu.h"
 #include "exec/exec-all.h"
 #include "sysemu/kvm.h"
+#include "sysemu/sev.h"
 #include "sysemu/cpus.h"
 #include "kvm_i386.h"
 
@@ -2192,6 +2193,10 @@  static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)
     char host_vendor[CPUID_VENDOR_SZ + 1];
     FeatureWord w;
 
+    if (sev_enabled()) {
+        def->xlevel = MAX(0x8000001f, def->xlevel);
+    }
+
     object_property_set_int(OBJECT(cpu), def->level, "level", errp);
     object_property_set_int(OBJECT(cpu), def->family, "family", errp);
     object_property_set_int(OBJECT(cpu), def->model, "model", errp);
@@ -2625,6 +2630,11 @@  void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             *edx = 0;
         }
         break;
+    case 0x8000001F:
+        if (sev_enabled()) {
+            host_cpuid(index, 0, eax, ebx, ecx, edx);
+        }
+        break;
     case 0xC0000000:
         *eax = env->cpuid_xlevel2;
         *ebx = 0;