From patchwork Fri Sep 23 07:20:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 9347705 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D0D16601C2 for ; Fri, 23 Sep 2016 08:17:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BFD1229F74 for ; Fri, 23 Sep 2016 08:17:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B475829FEA; Fri, 23 Sep 2016 08:17:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 63C8829F74 for ; Fri, 23 Sep 2016 08:17:51 +0000 (UTC) Received: from localhost ([::1]:41968 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bnLg6-0007DZ-FE for patchwork-qemu-devel@patchwork.kernel.org; Fri, 23 Sep 2016 04:17:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bnKn2-0001am-N4 for qemu-devel@nongnu.org; Fri, 23 Sep 2016 03:20:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bnKmy-0001Li-GX for qemu-devel@nongnu.org; Fri, 23 Sep 2016 03:20:55 -0400 Received: from mailapp02.imgtec.com ([217.156.133.132]:55193 helo=mailapp01.imgtec.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bnKmy-0001Le-AQ for qemu-devel@nongnu.org; Fri, 23 Sep 2016 03:20:52 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id B79C1957E1446; Fri, 23 Sep 2016 08:20:48 +0100 (IST) Received: from hhmipssw204.hh.imgtec.org (10.100.21.121) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.294.0; Fri, 23 Sep 2016 08:20:51 +0100 From: Leon Alrae To: Date: Fri, 23 Sep 2016 08:20:08 +0100 Message-ID: <1474615210-9006-8-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1474615210-9006-1-git-send-email-leon.alrae@imgtec.com> References: <1474615210-9006-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.21.121] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 217.156.133.132 Subject: [Qemu-devel] [PULL 7/9] linux-user: Fix certain argument alignment cases for Mips64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Aleksandar Markovic , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic The function that is changed in this patch is supposed to indicate that there was certain argument rearrangement related to 64-bit arguments on 32-bit platforms. The background on such rearrangements can be found, for example, in the man page for syscall(2). However, for 64-bit Mips architectures there is no such rearrangement, and this patch reflects it. Signed-off-by: Aleksandar Rikalo Signed-off-by: Aleksandar Markovic Reviewed-by: Laurent Vivier Reviewed-by: Leon Alrae Acked-by: Riku Voipio Signed-off-by: Leon Alrae --- linux-user/syscall.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 7aa2c1d..116e463 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -658,7 +658,7 @@ static inline int next_free_host_timer(void) static inline int regpairs_aligned(void *cpu_env) { return ((((CPUARMState *)cpu_env)->eabi) == 1) ; } -#elif defined(TARGET_MIPS) +#elif defined(TARGET_MIPS) && (TARGET_ABI_BITS == 32) static inline int regpairs_aligned(void *cpu_env) { return 1; } #elif defined(TARGET_PPC) && !defined(TARGET_PPC64) /* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs