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s=mail; t=1475705409; bh=9TGcYBW6mI1v8LKshfnaOE1FjcOAx3xnvvTvBySm/ZY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=59t6w35VR8PwxQ3mOS7muumhTkFEc5iQiVNLkTrR5rNVIUD/UTegY5bOA0IaiqRN9 Tr8ozu1vEaVV2v2ZZQ5tJh16UaLpQ07cdCeMqFE/3p8W2ZsAJK0JwRlMuevMpudok8 eOglP5TFRJtOjs8P+P4e8ZHcda8ryIP/+UOe2BLw= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=RxKIYG6+; dkim=pass (1024-bit key) header.d=greensocs.com header.b=RxKIYG6+ Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OItpRMW_YbH2; Thu, 6 Oct 2016 00:10:07 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id D076A2E8DCE; Thu, 6 Oct 2016 00:10:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1475705407; bh=9TGcYBW6mI1v8LKshfnaOE1FjcOAx3xnvvTvBySm/ZY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=RxKIYG6+NhS2lDFZYofqZLGpFkb/SRcKIz1xM99sebwUvs+Jf4Dt3iZjAgBfyC8QS OSjXTMHVv0InSkS/tW4oZ7fqoQ2iTPIiz8A3H2N/IusLZwPo2MIwIBJRhKF6cFkB1I yobJdy56sTkA/wgqO5NJS6utUBEdh1Vr5TR/Q6Ek= Received: from asus.localdomain (localhost [IPv6:::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: fred.konrad@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 0FE4F2E8DC6; Thu, 6 Oct 2016 00:10:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1475705407; bh=9TGcYBW6mI1v8LKshfnaOE1FjcOAx3xnvvTvBySm/ZY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=RxKIYG6+NhS2lDFZYofqZLGpFkb/SRcKIz1xM99sebwUvs+Jf4Dt3iZjAgBfyC8QS OSjXTMHVv0InSkS/tW4oZ7fqoQ2iTPIiz8A3H2N/IusLZwPo2MIwIBJRhKF6cFkB1I yobJdy56sTkA/wgqO5NJS6utUBEdh1Vr5TR/Q6Ek= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Thu, 6 Oct 2016 00:10:57 +0200 Message-Id: <1475705464-27130-4-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1475705464-27130-1-git-send-email-fred.konrad@greensocs.com> References: <1475705464-27130-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH V1 03/10] qemu-clk: allow to bind two clocks together X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, fred.konrad@greensocs.com, mark.burton@greensocs.com, alistair.francis@xilinx.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: KONRAD Frederic This introduces the clock binding and the update part. When the qemu_clk_rate_update(qemu_clk, int) function is called: * The clock callback is called on the qemu_clk so it can change the rate. * The qemu_clk_rate_update function is called on all the driven clock. Signed-off-by: KONRAD Frederic --- include/qemu/qemu-clock.h | 66 +++++++++++++++++++++++++++++++++++++++++++++++ qemu-clock.c | 56 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 122 insertions(+) diff --git a/include/qemu/qemu-clock.h b/include/qemu/qemu-clock.h index 1d56a2e..d575566 100644 --- a/include/qemu/qemu-clock.h +++ b/include/qemu/qemu-clock.h @@ -27,15 +27,29 @@ #include "qemu/osdep.h" #include "qom/object.h" +typedef uint64_t (*qemu_clk_on_rate_update_cb)(void *opaque, uint64_t rate); + #define TYPE_CLOCK "qemu-clk" #define QEMU_CLOCK(obj) OBJECT_CHECK(struct qemu_clk, (obj), TYPE_CLOCK) +typedef struct ClkList ClkList; + typedef struct qemu_clk { /*< private >*/ Object parent_obj; char *name; /* name of this clock in the device. */ + uint64_t in_rate; /* rate of the clock which drive this pin. */ + uint64_t out_rate; /* rate of this clock pin. */ + void *opaque; + qemu_clk_on_rate_update_cb cb; + QLIST_HEAD(, ClkList) bound; } *qemu_clk; +struct ClkList { + qemu_clk clk; + QLIST_ENTRY(ClkList) node; +}; + /** * qemu_clk_attach_to_device: * @dev: the device on which the clock need to be attached. @@ -59,4 +73,56 @@ void qemu_clk_attach_to_device(DeviceState *dev, qemu_clk clk, */ qemu_clk qemu_clk_get_pin(DeviceState *dev, const char *name); +/** + * qemu_clk_bind_clock: + * @out: the clock output. + * @in: the clock input. + * + * Connect the clock together. This is unidirectional so a + * qemu_clk_update_rate will go from @out to @in. + * + */ +void qemu_clk_bind_clock(qemu_clk out, qemu_clk in); + +/** + * qemu_clk_unbound: + * @out: the clock output. + * @in: the clock input. + * + * Disconnect the clocks if they were bound together. + * + */ +void qemu_clk_unbind(qemu_clk out, qemu_clk in); + +/** + * qemu_clk_update_rate: + * @clk: the clock to update. + * @rate: the new rate. + * + * Update the @clk to the new @rate. + * + */ +void qemu_clk_update_rate(qemu_clk clk, uint64_t rate); + +/** + * qemu_clk_refresh: + * @clk: the clock to be refreshed. + * + * If a model alters the topology of a clock tree, it must call this function + * to refresh the clock tree. + * + */ +void qemu_clk_refresh(qemu_clk clk); + +/** + * qemu_clk_set_callback: + * @clk: the clock where to set the callback. + * @cb: the callback to associate to the callback. + * @opaque: the opaque data passed to the calback. + * + */ +void qemu_clk_set_callback(qemu_clk clk, + qemu_clk_on_rate_update_cb cb, + void *opaque); + #endif /* QEMU_CLOCK_H */ diff --git a/qemu-clock.c b/qemu-clock.c index 0ba6caf..541f615 100644 --- a/qemu-clock.c +++ b/qemu-clock.c @@ -37,6 +37,62 @@ } \ } while (0); +void qemu_clk_refresh(qemu_clk clk) +{ + qemu_clk_update_rate(clk, clk->in_rate); +} + +void qemu_clk_update_rate(qemu_clk clk, uint64_t rate) +{ + ClkList *child; + + clk->in_rate = rate; + clk->out_rate = rate; + + if (clk->cb) { + clk->out_rate = clk->cb(clk->opaque, rate); + } + + DPRINTF("%s output rate updated to %" PRIu64 "\n", + object_get_canonical_path(OBJECT(clk)), + clk->out_rate); + + QLIST_FOREACH(child, &clk->bound, node) { + qemu_clk_update_rate(child->clk, clk->out_rate); + } +} + +void qemu_clk_bind_clock(qemu_clk out, qemu_clk in) +{ + ClkList *child; + + child = g_malloc(sizeof(child)); + assert(child); + child->clk = in; + QLIST_INSERT_HEAD(&out->bound, child, node); + qemu_clk_update_rate(in, out->out_rate); +} + +void qemu_clk_unbind(qemu_clk out, qemu_clk in) +{ + ClkList *child, *next; + + QLIST_FOREACH_SAFE(child, &out->bound, node, next) { + if (child->clk == in) { + QLIST_REMOVE(child, node); + g_free(child); + } + } +} + +void qemu_clk_set_callback(qemu_clk clk, + qemu_clk_on_rate_update_cb cb, + void *opaque) +{ + clk->cb = cb; + clk->opaque = opaque; +} + void qemu_clk_attach_to_device(DeviceState *dev, qemu_clk clk, const char *name) {