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Dadhania" X-Patchwork-Id: 9391775 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5B2756077A for ; Mon, 24 Oct 2016 09:17:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A5D028E16 for ; Mon, 24 Oct 2016 09:17:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3D4A328E20; Mon, 24 Oct 2016 09:17:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9B10A28E16 for ; Mon, 24 Oct 2016 09:17:56 +0000 (UTC) Received: from localhost ([::1]:45393 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bybOF-0005nX-S4 for patchwork-qemu-devel@patchwork.kernel.org; Mon, 24 Oct 2016 05:17:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40765) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bybNd-0005hZ-1t for qemu-devel@nongnu.org; Mon, 24 Oct 2016 05:17:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bybNX-0003Ls-W3 for qemu-devel@nongnu.org; Mon, 24 Oct 2016 05:17:17 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:55595) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bybNX-0003Kp-MZ for qemu-devel@nongnu.org; Mon, 24 Oct 2016 05:17:11 -0400 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u9O9DPEI028677 for ; Mon, 24 Oct 2016 05:17:10 -0400 Received: from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141]) by mx0a-001b2d01.pphosted.com with ESMTP id 269ekttv07-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 24 Oct 2016 05:17:10 -0400 Received: from localhost by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 24 Oct 2016 19:17:07 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id CE1E52BB0057; Mon, 24 Oct 2016 20:17:06 +1100 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u9O9H67713107376; Mon, 24 Oct 2016 20:17:06 +1100 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u9O9H6G6029062; Mon, 24 Oct 2016 20:17:06 +1100 Received: from abhimanyu.in.ibm.com ([9.79.240.74]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u9O9FExC022655; Mon, 24 Oct 2016 20:17:01 +1100 From: Nikunj A Dadhania To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Date: Mon, 24 Oct 2016 14:44:59 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477300500-25930-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1477300500-25930-1-git-send-email-nikunj@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16102409-0048-0000-0000-000001CD6F65 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16102409-0049-0000-0000-000046CE9390 Message-Id: <1477300500-25930-4-git-send-email-nikunj@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-10-23_18:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1610240168 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 3/4] target-ppc: add vrldnmi and vrlwmi instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ego@linux.vnet.ibm.com, sandipandas1990@gmail.com, nikunj@linux.vnet.ibm.com, qemu-devel@nongnu.org, hegdevasant@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: "Gautham R. Shenoy" vrldmi: Vector Rotate Left Dword then Mask Insert vrlwmi: Vector Rotate Left Word then Mask Insert Signed-off-by: Gautham R. Shenoy Signed-off-by: Bharata B Rao Signed-off-by: Nikunj A Dadhania --- disas/ppc.c | 2 + target-ppc/helper.h | 2 + target-ppc/int_helper.c | 88 +++++++++++++++++++++++++++++++++++++ target-ppc/translate/vmx-impl.inc.c | 6 +++ target-ppc/translate/vmx-ops.inc.c | 4 +- 5 files changed, 100 insertions(+), 2 deletions(-) diff --git a/disas/ppc.c b/disas/ppc.c index 052cebe..32f0d8d 100644 --- a/disas/ppc.c +++ b/disas/ppc.c @@ -2286,6 +2286,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "vrlh", VX(4, 68), VX_MASK, PPCVEC, { VD, VA, VB } }, { "vrlw", VX(4, 132), VX_MASK, PPCVEC, { VD, VA, VB } }, { "vrsqrtefp", VX(4, 330), VX_MASK, PPCVEC, { VD, VB } }, +{ "vrldmi", VX(4, 197), VX_MASK, PPCVEC, { VD, VA, VB } }, +{ "vrlwmi", VX(4, 133), VX_MASK, PPCVEC, { VD, VA, VB} }, { "vsel", VXA(4, 42), VXA_MASK, PPCVEC, { VD, VA, VB, VC } }, { "vsl", VX(4, 452), VX_MASK, PPCVEC, { VD, VA, VB } }, { "vslb", VX(4, 260), VX_MASK, PPCVEC, { VD, VA, VB } }, diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 0337292..9fb8f0d 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -325,6 +325,8 @@ DEF_HELPER_4(vmaxfp, void, env, avr, avr, avr) DEF_HELPER_4(vminfp, void, env, avr, avr, avr) DEF_HELPER_3(vrefp, void, env, avr, avr) DEF_HELPER_3(vrsqrtefp, void, env, avr, avr) +DEF_HELPER_3(vrlwmi, void, avr, avr, avr) +DEF_HELPER_3(vrldmi, void, avr, avr, avr) DEF_HELPER_5(vmaddfp, void, env, avr, avr, avr, avr) DEF_HELPER_5(vnmsubfp, void, env, avr, avr, avr, avr) DEF_HELPER_3(vexptefp, void, env, avr, avr) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index dca4798..2273872 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1717,6 +1717,94 @@ void helper_vrsqrtefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) } } +#define EXTRACT_BITS(size) \ +static inline uint##size##_t extract_bits_u##size(uint##size##_t reg, \ + uint##size##_t start, \ + uint##size##_t end) \ +{ \ + uint##size##_t nr_mask_bits = end - start + 1; \ + uint##size##_t val = 1; \ + uint##size##_t mask = (val << nr_mask_bits) - 1; \ + uint##size##_t shifted_reg = reg >> ((size - 1) - end); \ + return shifted_reg & mask; \ +} + +EXTRACT_BITS(64); +EXTRACT_BITS(32); + +#define MASK(size, max_val) \ +static inline uint##size##_t mask_u##size(uint##size##_t start, \ + uint##size##_t end) \ +{ \ + uint##size##_t ret, max_bit = size - 1; \ + \ + if (likely(start == 0)) { \ + ret = max_val << (max_bit - end); \ + } else if (likely(end == max_bit)) { \ + ret = max_val >> start; \ + } else { \ + ret = (((uint##size##_t)(-1ULL)) >> (start)) ^ \ + (((uint##size##_t)(-1ULL) >> (end)) >> 1); \ + if (unlikely(start > end)) { \ + return ~ret; \ + } \ + } \ + \ + return ret; \ +} + +MASK(32, UINT32_MAX); +MASK(64, UINT64_MAX); + +#define LEFT_ROTATE(size) \ +static inline uint##size##_t left_rotate_u##size(uint##size##_t val, \ + uint##size##_t shift) \ +{ \ + if (!shift) { \ + return val; \ + } \ + \ + uint##size##_t left_val = extract_bits_u##size(val, 0, shift - 1); \ + uint##size##_t right_val = val & mask_u##size(shift, size - 1); \ + \ + return right_val << shift | left_val; \ +} + +LEFT_ROTATE(32); +LEFT_ROTATE(64); + +#define VRLMI(name, size, element, \ + begin_first, begin_last, \ + end_first, end_last, \ + shift_first, shift_last) \ +void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ +{ \ + int i; \ + for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ + uint##size##_t src1 = a->element[i]; \ + uint##size##_t src2 = b->element[i]; \ + uint##size##_t src3 = r->element[i]; \ + uint##size##_t begin, end, shift, mask, rot_val; \ + \ + begin = extract_bits_u##size(src2, begin_first, begin_last);\ + end = extract_bits_u##size(src2, end_first, end_last); \ + shift = extract_bits_u##size(src2, shift_first, shift_last);\ + rot_val = left_rotate_u##size(src1, shift); \ + mask = mask_u##size(begin, end); \ + r->element[i] = (rot_val & mask) | (src3 & ~mask); \ + } \ +} + +VRLMI(vrldmi, 64, u64, + 42, 47, /* begin_first, begin_last */ + 50, 55, /* end_first, end_last */ + 58, 63); /* shift_first, shift_last */ + +VRLMI(vrlwmi, 32, u32, + 11, 15, /* begin_first, begin_last */ + 19, 23, /* end_first, end_last */ + 27, 31); /* shift_first, shift_last */ + void helper_vsel(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c index fc612d9..fdfbd6a 100644 --- a/target-ppc/translate/vmx-impl.inc.c +++ b/target-ppc/translate/vmx-impl.inc.c @@ -488,7 +488,13 @@ GEN_VXFORM_DUAL(vsubeuqm, PPC_NONE, PPC2_ALTIVEC_207, \ GEN_VXFORM(vrlb, 2, 0); GEN_VXFORM(vrlh, 2, 1); GEN_VXFORM(vrlw, 2, 2); +GEN_VXFORM(vrlwmi, 2, 2); +GEN_VXFORM_DUAL(vrlw, PPC_ALTIVEC, PPC_NONE, \ + vrlwmi, PPC_NONE, PPC2_ISA300) GEN_VXFORM(vrld, 2, 3); +GEN_VXFORM(vrldmi, 2, 3); +GEN_VXFORM_DUAL(vrld, PPC_NONE, PPC2_ALTIVEC_207, \ + vrldmi, PPC_NONE, PPC2_ISA300) GEN_VXFORM(vsl, 2, 7); GEN_VXFORM(vsr, 2, 11); GEN_VXFORM_ENV(vpkuhum, 7, 0); diff --git a/target-ppc/translate/vmx-ops.inc.c b/target-ppc/translate/vmx-ops.inc.c index cc7ed7e..76b3593 100644 --- a/target-ppc/translate/vmx-ops.inc.c +++ b/target-ppc/translate/vmx-ops.inc.c @@ -143,8 +143,8 @@ GEN_VXFORM_207(vsubcuq, 0, 21), GEN_VXFORM_DUAL(vsubeuqm, vsubecuq, 31, 0xFF, PPC_NONE, PPC2_ALTIVEC_207), GEN_VXFORM(vrlb, 2, 0), GEN_VXFORM(vrlh, 2, 1), -GEN_VXFORM(vrlw, 2, 2), -GEN_VXFORM_207(vrld, 2, 3), +GEN_VXFORM_DUAL(vrlw, vrlwmi, 2, 2, PPC_ALTIVEC, PPC_NONE), +GEN_VXFORM_DUAL(vrld, vrldmi, 2, 3, PPC_NONE, PPC2_ALTIVEC_207), GEN_VXFORM(vsl, 2, 7), GEN_VXFORM(vsr, 2, 11), GEN_VXFORM(vpkuhum, 7, 0),