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20:e1gWAEMGbKnDj+so4BSVSPo22jZIZPKAQy/bNx4eQZd1RTGvocGfRBFWrtE2hdP92SV5rpG0VXJnCdee37uyDBP4YyFbAD/0yZsHKaex85QCLeE8wx4KnTgF8H1FR8JuDLqwEtyS/xPB6j5jpyaxaIueW1mtP/OJ5ii27pljgHHcOpT9MNu8t2yERiMWPRfXT9BRtkDNwqMVH1ZPvusktm4407ub5JYyvDLJi+1KnMcAI6MHikD4HCRu3ANvsU5Y X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2016 15:52:21.6637 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB0665 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.36.67 Subject: [Qemu-devel] [RFC PATCH v3 03/18] exec: add debug version of physical memory read and write apis X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: brijesh.ksingh@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The patch adds the following new APIs: - cpu_physical_memory_read_debug - cpu_physical_memory_write_debug - cpu_physical_memory_rw_debug - ldl_phys_debug - ldq_phys_debug The idea behind this patch is that if all the qemu monitor memory dumps and gdbserver accesses are done through these common APIs then in future we can define some kind of global debug policy to control debug behavior. Signed-off-by: Brijesh Singh Reviewed-by: Paolo Bonzini --- exec.c | 32 ++++++++++++++++++++++++++++++++ include/exec/cpu-common.h | 15 +++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/exec.c b/exec.c index d3356cd..4022e13 100644 --- a/exec.c +++ b/exec.c @@ -3149,6 +3149,30 @@ uint32_t ldl_phys(AddressSpace *as, hwaddr addr) return address_space_ldl(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); } +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr) +{ + MemTxAttrs attrs = MEMTXATTRS_DEBUG; + int asidx = cpu_asidx_from_attrs(cpu, attrs); + uint32_t val; + + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, + addr, (void *) &val, + 4, attrs, READ_DATA); + return tswap32(val); +} + +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr) +{ + MemTxAttrs attrs = MEMTXATTRS_DEBUG; + int asidx = cpu_asidx_from_attrs(cpu, attrs); + uint64_t val; + + cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as, + addr, (void *) &val, + 8, attrs, READ_DATA); + return val; +} + uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr) { return address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); @@ -3659,6 +3683,14 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val) address_space_stq_be(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, + int len, int is_write) +{ + cpu_physical_memory_rw_debug_internal(&address_space_memory, addr, + buf, len, MEMTXATTRS_DEBUG, + is_write ? WRITE_DATA : READ_DATA); +} + /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, uint8_t *buf, int len, int is_write) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index cffdc13..9abff47 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -67,6 +67,8 @@ size_t qemu_ram_pagesize(RAMBlock *block); void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, int len, int is_write); +void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf, + int len, int is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, int len) { @@ -77,6 +79,19 @@ static inline void cpu_physical_memory_write(hwaddr addr, { cpu_physical_memory_rw(addr, (void *)buf, len, 1); } +static inline void cpu_physical_memory_read_debug(hwaddr addr, + void *buf, int len) +{ + cpu_physical_memory_rw_debug(addr, buf, len, 0); +} +static inline void cpu_physical_memory_write_debug(hwaddr addr, + const void *buf, int len) +{ + cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1); +} +uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr); +uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr); + void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, int is_write);