From patchwork Mon Nov 21 04:58:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 9438723 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C7E3660235 for ; Mon, 21 Nov 2016 04:59:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B985B283BC for ; Mon, 21 Nov 2016 04:59:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AB60928447; Mon, 21 Nov 2016 04:59:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4DACB283BC for ; Mon, 21 Nov 2016 04:59:18 +0000 (UTC) Received: from localhost ([::1]:47375 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c8ghI-0005y9-NR for patchwork-qemu-devel@patchwork.kernel.org; Sun, 20 Nov 2016 23:59:16 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34801) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c8ggr-0005xU-Ey for qemu-devel@nongnu.org; Sun, 20 Nov 2016 23:58:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c8ggq-0001mr-Hh for qemu-devel@nongnu.org; Sun, 20 Nov 2016 23:58:49 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:40313) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c8ggp-0001kl-Ms; Sun, 20 Nov 2016 23:58:48 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3tMbwK5xSCz9t3N; Mon, 21 Nov 2016 15:58:41 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1479704321; bh=JEvReedfi/bBJHbsyvkhCIbVddzRlAquS8GZr3Mdc+E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hi8oB3r2cTiXQq+cw+/jy/NNQ/e1tlTjViIJuhxSTODPODpjYy6Mjh4XWHOuEOstw qmn+6avUTRWvQP+HOSNU0b6t11OnfHFLEptD7ZwHts+X0zUvy/FfyKKCmpD6TEl4K5 gfXx+p8rZCJKE0qo7dgxzbXLvkU5I1XRBqOoPvGQ= From: David Gibson To: mdroth@linux.vnet.ibm.com, dgilbert@redhat.com Date: Mon, 21 Nov 2016 15:58:32 +1100 Message-Id: <1479704316-7589-2-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479704316-7589-1-git-send-email-david@gibson.dropbear.id.au> References: <1479704316-7589-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH 1/5] target-ppc: Fix CPU migration from qemu-2.6 <-> later versions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP When migration for target-ppc was converted to vmstate, several VMSTATE_EQUAL() checks were foolishly included of things that really should be internal state. Specifically we verified equality of the insns_flags and insns_flags2 fields, which are used within TCG to determine which groups of instructions are available on this cpu model. Between qemu-2.6 and qemu-2.7 we made some changes to these classes which broke migration. This path fixes migration both forwards and backwards. On migration from 2.6 to later versions we import the fields into teporary variables, which we then ignore. In migration backwards, we populate the temporary fields from the runtime fields, but mask out the bits which were added after qemu-2.6, allowing the VMSTATE_EQUAL in qemu-2.6 to accept the stream. Signed-off-by: David Gibson --- target-ppc/cpu.h | 6 ++++++ target-ppc/machine.c | 41 +++++++++++++++++++++++++++++++++++++---- 2 files changed, 43 insertions(+), 4 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 1c90adb..7798b2e 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1166,6 +1166,12 @@ struct PowerPCCPU { int cpu_dt_id; uint32_t max_compat; uint32_t cpu_version; + + /* fields used only during migration for compatibility hacks */ + target_ulong mig_msr_mask; + uint64_t mig_insns_flags; + uint64_t mig_insns_flags2; + uint32_t mig_nb_BATs; }; static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env) diff --git a/target-ppc/machine.c b/target-ppc/machine.c index e43cb6c..4e12e13 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -140,6 +140,22 @@ static void cpu_pre_save(void *opaque) PowerPCCPU *cpu = opaque; CPUPPCState *env = &cpu->env; int i; + uint64_t insns_compat_mask = + PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB + | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES + | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | PPC_FLOAT_FRSQRTES + | PPC_FLOAT_STFIWX | PPC_FLOAT_EXT + | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ + | PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC + | PPC_64B | PPC_64BX | PPC_ALTIVEC + | PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD; + uint64_t insns_compat_mask2 = + PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX + | PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 + | PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 + | PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 + | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 + | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64| PPC2_TM; env->spr[SPR_LR] = env->lr; env->spr[SPR_CTR] = env->ctr; @@ -161,6 +177,12 @@ static void cpu_pre_save(void *opaque) env->spr[SPR_IBAT4U + 2*i] = env->IBAT[0][i+4]; env->spr[SPR_IBAT4U + 2*i + 1] = env->IBAT[1][i+4]; } + + /* Hacks for migration compatibility between 2.6, 2.7 & 2.8 */ + cpu->mig_msr_mask = env->msr_mask; + cpu->mig_insns_flags = env->insns_flags & insns_compat_mask; + cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2; + cpu->mig_nb_BATs = env->nb_BATs; } static int cpu_post_load(void *opaque, int version_id) @@ -208,6 +230,17 @@ static int cpu_post_load(void *opaque, int version_id) hreg_compute_mem_idx(env); + if (cpu->mig_insns_flags != env->insns_flags) { + fprintf(stderr, "INSNS: Added 0x%" PRIx64 " removed 0x%" PRIx64 "\n", + env->insns_flags & ~cpu->mig_insns_flags, + cpu->mig_insns_flags & ~env->insns_flags); + } + if (cpu->mig_insns_flags2 != env->insns_flags2) { + fprintf(stderr, "INSNS2: Added 0x%" PRIx64 " removed 0x%" PRIx64 "\n", + env->insns_flags2 & ~cpu->mig_insns_flags2, + cpu->mig_insns_flags2 & ~env->insns_flags2); + } + return 0; } @@ -561,10 +594,10 @@ const VMStateDescription vmstate_ppc_cpu = { /* FIXME: access_type? */ /* Sanity checking */ - VMSTATE_UINTTL_EQUAL(env.msr_mask, PowerPCCPU), - VMSTATE_UINT64_EQUAL(env.insns_flags, PowerPCCPU), - VMSTATE_UINT64_EQUAL(env.insns_flags2, PowerPCCPU), - VMSTATE_UINT32_EQUAL(env.nb_BATs, PowerPCCPU), + VMSTATE_UINTTL(mig_msr_mask, PowerPCCPU), + VMSTATE_UINT64(mig_insns_flags, PowerPCCPU), + VMSTATE_UINT64(mig_insns_flags2, PowerPCCPU), + VMSTATE_UINT32(mig_nb_BATs, PowerPCCPU), VMSTATE_END_OF_LIST() }, .subsections = (const VMStateDescription*[]) {