@@ -18,6 +18,7 @@
* We expect to be run in Non-secure mode, thus we define the
* group1 enable bits with respect to that view.
*/
+#define GICD_CTLR 0x0000
#define GICD_CTLR_RWP (1U << 31)
#define GICD_CTLR_ARE_NS (1U << 4)
#define GICD_CTLR_ENABLE_G1A (1U << 1)
@@ -33,6 +34,11 @@
#define GICR_ISENABLER0 GICD_ISENABLER
#define GICR_IPRIORITYR0 GICD_IPRIORITYR
+#define GICR_PROPBASER 0x0070
+#define GICR_PENDBASER 0x0078
+#define GICR_CTLR GICD_CTLR
+#define GICR_CTLR_ENABLE_LPIS (1UL << 0)
+
#define ICC_SGI1R_AFFINITY_1_SHIFT 16
#define ICC_SGI1R_AFFINITY_2_SHIFT 32
#define ICC_SGI1R_AFFINITY_3_SHIFT 48
PROPBASER, PENDBASE and GICR_CTRL will be used for LPI management. Signed-off-by: Eric Auger <eric.auger@redhat.com> --- lib/arm/asm/gic-v3.h | 6 ++++++ 1 file changed, 6 insertions(+)