From patchwork Wed Jan 25 10:09:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 9536655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 29478601D3 for ; Wed, 25 Jan 2017 10:10:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1806A26B39 for ; Wed, 25 Jan 2017 10:10:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0CC3B26E69; Wed, 25 Jan 2017 10:10:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5088C26B39 for ; Wed, 25 Jan 2017 10:10:43 +0000 (UTC) Received: from localhost ([::1]:58626 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cWKXK-00008d-9V for patchwork-qemu-devel@patchwork.kernel.org; Wed, 25 Jan 2017 05:10:42 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57081) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cWKWh-0008UD-Ae for qemu-devel@nongnu.org; Wed, 25 Jan 2017 05:10:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cWKWg-0000mY-9H for qemu-devel@nongnu.org; Wed, 25 Jan 2017 05:10:03 -0500 Received: from mx1.redhat.com ([209.132.183.28]:35996) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cWKWg-0000mM-1h for qemu-devel@nongnu.org; Wed, 25 Jan 2017 05:10:02 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4754E3A76AB for ; Wed, 25 Jan 2017 10:10:02 +0000 (UTC) Received: from nilsson.home.kraxel.org (ovpn-116-45.ams2.redhat.com [10.36.116.45]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v0PAA0fl004683; Wed, 25 Jan 2017 05:10:01 -0500 Received: by nilsson.home.kraxel.org (Postfix, from userid 500) id 8D84880734; Wed, 25 Jan 2017 11:09:59 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Wed, 25 Jan 2017 11:09:56 +0100 Message-Id: <1485338996-17095-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 25 Jan 2017 10:10:02 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH] cirrus: fix blit address mask handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Apply the cirrus_addr_mask to cirrus_blt_dstaddr and cirrus_blt_srcaddr right after assigning them, in cirrus_bitblt_start(), instead of having this all over the place in the cirrus code, and missing a few places. Reported-by: Wolfgang Bumiller Signed-off-by: Gerd Hoffmann --- hw/display/cirrus_vga.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 5547a60..c71bbec 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -304,14 +304,14 @@ static bool blit_is_unsafe(struct CirrusVGAState *s, bool dst_only) } if (blit_region_is_unsafe(s, s->cirrus_blt_dstpitch, - s->cirrus_blt_dstaddr & s->cirrus_addr_mask)) { + s->cirrus_blt_dstaddr)) { return true; } if (dst_only) { return false; } if (blit_region_is_unsafe(s, s->cirrus_blt_srcpitch, - s->cirrus_blt_srcaddr & s->cirrus_addr_mask)) { + s->cirrus_blt_srcaddr)) { return true; } @@ -673,7 +673,7 @@ static int cirrus_bitblt_common_patterncopy(CirrusVGAState * s, { uint8_t *dst; - dst = s->vga.vram_ptr + (s->cirrus_blt_dstaddr & s->cirrus_addr_mask); + dst = s->vga.vram_ptr + s->cirrus_blt_dstaddr; if (blit_is_unsafe(s, false)) return 0; @@ -697,7 +697,7 @@ static int cirrus_bitblt_solidfill(CirrusVGAState *s, int blt_rop) return 0; } rop_func = cirrus_fill[rop_to_index[blt_rop]][s->cirrus_blt_pixelwidth - 1]; - rop_func(s, s->vga.vram_ptr + (s->cirrus_blt_dstaddr & s->cirrus_addr_mask), + rop_func(s, s->vga.vram_ptr + s->cirrus_blt_dstaddr, s->cirrus_blt_dstpitch, s->cirrus_blt_width, s->cirrus_blt_height); cirrus_invalidate_region(s, s->cirrus_blt_dstaddr, @@ -715,9 +715,8 @@ static int cirrus_bitblt_solidfill(CirrusVGAState *s, int blt_rop) static int cirrus_bitblt_videotovideo_patterncopy(CirrusVGAState * s) { - return cirrus_bitblt_common_patterncopy(s, - s->vga.vram_ptr + ((s->cirrus_blt_srcaddr & ~7) & - s->cirrus_addr_mask)); + return cirrus_bitblt_common_patterncopy(s, s->vga.vram_ptr + + (s->cirrus_blt_srcaddr & ~7)); } static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h) @@ -771,10 +770,8 @@ static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h) if (notify) graphic_hw_update(s->vga.con); - (*s->cirrus_rop) (s, s->vga.vram_ptr + - (s->cirrus_blt_dstaddr & s->cirrus_addr_mask), - s->vga.vram_ptr + - (s->cirrus_blt_srcaddr & s->cirrus_addr_mask), + (*s->cirrus_rop) (s, s->vga.vram_ptr + s->cirrus_blt_dstaddr, + s->vga.vram_ptr + s->cirrus_blt_srcaddr, s->cirrus_blt_dstpitch, s->cirrus_blt_srcpitch, s->cirrus_blt_width, s->cirrus_blt_height); @@ -825,8 +822,7 @@ static void cirrus_bitblt_cputovideo_next(CirrusVGAState * s) } else { /* at least one scan line */ do { - (*s->cirrus_rop)(s, s->vga.vram_ptr + - (s->cirrus_blt_dstaddr & s->cirrus_addr_mask), + (*s->cirrus_rop)(s, s->vga.vram_ptr + s->cirrus_blt_dstaddr, s->cirrus_bltbuf, 0, 0, s->cirrus_blt_width, 1); cirrus_invalidate_region(s, s->cirrus_blt_dstaddr, 0, s->cirrus_blt_width, 1); @@ -945,6 +941,9 @@ static void cirrus_bitblt_start(CirrusVGAState * s) s->cirrus_blt_modeext = s->vga.gr[0x33]; blt_rop = s->vga.gr[0x32]; + s->cirrus_blt_dstaddr &= s->cirrus_addr_mask; + s->cirrus_blt_srcaddr &= s->cirrus_addr_mask; + #ifdef DEBUG_BITBLT printf("rop=0x%02x mode=0x%02x modeext=0x%02x w=%d h=%d dpitch=%d spitch=%d daddr=0x%08x saddr=0x%08x writemask=0x%02x\n", blt_rop,