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s=mail; t=1485424073; bh=jQvTJyakHMFgoCo/odOe3X4Okq8OToEzrN9HZBqZQrE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=oqIIdp6czlgbGVXyUnvlv+bVGYp72OetfGDVjl5LfUfk1z+oeQf8Dwc5IXpZeRGvx 7ev8FLB7CxMXmtwUy3095ZRaNldiGZl/AyPsl2RJkm7PuJJh2U4i94Qnoe5RBgNM9T +xwvVsGMbHbCAHiFqMsO+rajUF7ShN/YwZ1j9h6k= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=0belO1jW; dkim=pass (1024-bit key) header.d=greensocs.com header.b=0belO1jW Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TW4Cl5CivdLT; Thu, 26 Jan 2017 10:47:51 +0100 (CET) Received: by greensocs.com (Postfix, from userid 998) id 84163389856; Thu, 26 Jan 2017 10:47:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1485424071; bh=jQvTJyakHMFgoCo/odOe3X4Okq8OToEzrN9HZBqZQrE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=0belO1jWOk21Od6eT/Copb3kd/QVyo8sm6gc5MXi/6E07MrH3LsnbfVQRqGNWUQQB /AUJCHmCTf75p3c+29QkOW3385PuSMDhLq/nPYV5CZODZrt/zCkikF1alof32dOfjP TJevdRXUFGf0CbFlGixng3ksYBczJ+YZem3nsaF0= Received: from corsair.home (bd231-7-88-127-3-24.fbx.proxad.net [88.127.3.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: fred.konrad@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id C5878389855; Thu, 26 Jan 2017 10:47:50 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1485424071; bh=jQvTJyakHMFgoCo/odOe3X4Okq8OToEzrN9HZBqZQrE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=0belO1jWOk21Od6eT/Copb3kd/QVyo8sm6gc5MXi/6E07MrH3LsnbfVQRqGNWUQQB /AUJCHmCTf75p3c+29QkOW3385PuSMDhLq/nPYV5CZODZrt/zCkikF1alof32dOfjP TJevdRXUFGf0CbFlGixng3ksYBczJ+YZem3nsaF0= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Thu, 26 Jan 2017 10:47:33 +0100 Message-Id: <1485424060-12217-4-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1485424060-12217-1-git-send-email-fred.konrad@greensocs.com> References: <1485424060-12217-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH V2 03/10] qemu-clk: allow to bind two clocks together X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, fred.konrad@greensocs.com, mark.burton@greensocs.com, alistair.francis@xilinx.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: KONRAD Frederic This introduces the clock binding and the update part. When the qemu_clk_rate_update(qemu_clk, int) function is called: * The clock callback is called on the qemu_clk so it can change the rate. * The qemu_clk_rate_update function is called on all the driven clock. Signed-off-by: KONRAD Frederic V1 -> V2: * Rename qemu_clk_on_rate_update_cb to QEMUClkRateUpdateCallback and move the pointer to the structure instead of having a pointer-to-function type. --- include/qemu/qemu-clock.h | 67 +++++++++++++++++++++++++++++++++++++++++++++++ qemu-clock.c | 56 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 123 insertions(+) diff --git a/include/qemu/qemu-clock.h b/include/qemu/qemu-clock.h index 3e692d3..6d30299 100644 --- a/include/qemu/qemu-clock.h +++ b/include/qemu/qemu-clock.h @@ -30,12 +30,25 @@ #define TYPE_CLOCK "qemu-clk" #define QEMU_CLOCK(obj) OBJECT_CHECK(struct qemu_clk, (obj), TYPE_CLOCK) +typedef struct ClkList ClkList; +typedef uint64_t QEMUClkRateUpdateCallback(void *opaque, uint64_t rate); + typedef struct qemu_clk { /*< private >*/ Object parent_obj; char *name; /* name of this clock in the device. */ + uint64_t in_rate; /* rate of the clock which drive this pin. */ + uint64_t out_rate; /* rate of this clock pin. */ + void *opaque; + QEMUClkRateUpdateCallback *cb; + QLIST_HEAD(, ClkList) bound; } *qemu_clk; +struct ClkList { + qemu_clk clk; + QLIST_ENTRY(ClkList) node; +}; + /** * qemu_clk_device_add_clock: * @dev: the device on which the clock needs to be added. @@ -59,4 +72,58 @@ void qemu_clk_device_add_clock(DeviceState *dev, qemu_clk clk, */ qemu_clk qemu_clk_device_get_clock(DeviceState *dev, const char *name); +/** + * qemu_clk_bind_clock: + * @out: the clock output. + * @in: the clock input. + * + * Connect the clock together. This is unidirectional so a + * qemu_clk_update_rate will go from @out to @in. + * + */ +void qemu_clk_bind_clock(qemu_clk out, qemu_clk in); + +/** + * qemu_clk_unbind: + * @out: the clock output. + * @in: the clock input. + * + * Disconnect the clocks if they were bound together. + * + */ +void qemu_clk_unbind(qemu_clk out, qemu_clk in); + +/** + * qemu_clk_update_rate: + * @clk: the clock to update. + * @rate: the new rate in Hz. + * + * Update the @clk to the new @rate. + * + */ +void qemu_clk_update_rate(qemu_clk clk, uint64_t rate); + +/** + * qemu_clk_refresh: + * @clk: the clock to be refreshed. + * + * If a model alters the topology of a clock tree, it must call this function on + * the clock source to refresh the clock tree. + * + */ +void qemu_clk_refresh(qemu_clk clk); + +/** + * qemu_clk_set_callback: + * @clk: the clock associated to the callback. + * @cb: the function which is called when a refresh happen on the clock @clk. + * @opaque: the opaque data passed to the callback. + * + * Set the callback @cb which will be called when the clock @clk is updated. + * + */ +void qemu_clk_set_callback(qemu_clk clk, + QEMUClkRateUpdateCallback *cb, + void *opaque); + #endif /* QEMU_CLOCK_H */ diff --git a/qemu-clock.c b/qemu-clock.c index 803deb3..8c12368 100644 --- a/qemu-clock.c +++ b/qemu-clock.c @@ -37,6 +37,62 @@ } \ } while (0); +void qemu_clk_refresh(qemu_clk clk) +{ + qemu_clk_update_rate(clk, clk->in_rate); +} + +void qemu_clk_update_rate(qemu_clk clk, uint64_t rate) +{ + ClkList *child; + + clk->in_rate = rate; + clk->out_rate = rate; + + if (clk->cb) { + clk->out_rate = clk->cb(clk->opaque, rate); + } + + DPRINTF("%s output rate updated to %" PRIu64 "\n", + object_get_canonical_path(OBJECT(clk)), + clk->out_rate); + + QLIST_FOREACH(child, &clk->bound, node) { + qemu_clk_update_rate(child->clk, clk->out_rate); + } +} + +void qemu_clk_bind_clock(qemu_clk out, qemu_clk in) +{ + ClkList *child; + + child = g_malloc(sizeof(child)); + assert(child); + child->clk = in; + QLIST_INSERT_HEAD(&out->bound, child, node); + qemu_clk_update_rate(in, out->out_rate); +} + +void qemu_clk_unbind(qemu_clk out, qemu_clk in) +{ + ClkList *child, *next; + + QLIST_FOREACH_SAFE(child, &out->bound, node, next) { + if (child->clk == in) { + QLIST_REMOVE(child, node); + g_free(child); + } + } +} + +void qemu_clk_set_callback(qemu_clk clk, + QEMUClkRateUpdateCallback *cb, + void *opaque) +{ + clk->cb = cb; + clk->opaque = opaque; +} + void qemu_clk_device_add_clock(DeviceState *dev, qemu_clk clk, const char *name) {