From patchwork Sat Jan 28 06:56:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 9543027 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 570E9604A0 for ; Sat, 28 Jan 2017 06:57:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3EA7C27F07 for ; Sat, 28 Jan 2017 06:57:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 30111281C3; Sat, 28 Jan 2017 06:57:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1D18827F07 for ; Sat, 28 Jan 2017 06:57:07 +0000 (UTC) Received: from localhost ([::1]:50207 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cXMwb-00042b-D3 for patchwork-qemu-devel@patchwork.kernel.org; Sat, 28 Jan 2017 01:57:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42993) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cXMwD-0003rV-LH for qemu-devel@nongnu.org; Sat, 28 Jan 2017 01:56:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cXMwA-00014W-Gu for qemu-devel@nongnu.org; Sat, 28 Jan 2017 01:56:41 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:35633) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cXMwA-000143-7u for qemu-devel@nongnu.org; Sat, 28 Jan 2017 01:56:38 -0500 Received: by mail-wm0-f68.google.com with SMTP id d140so63313921wmd.2 for ; Fri, 27 Jan 2017 22:56:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id; bh=CgMKzfmGrtcZmWGwGXn/KiQQQmT9KZISL5shZRAF5ig=; b=Q0KAtGAz5wfxIc7C/tLNzhNF0snDCufF0kZkJZNEGnbhUP6M5g4YyD1CQBcdjHrDFu iheXHGUAC/H/Xg+493KNm67GhMldLoeKlRJCLhZfnwZ530Quaq4BaySh+i3onXI7yTlg HSEM0TiEkQ1JzVxyWjJIcfd6BNai6rQTYnvuMrjyn9bZ6+N1XdyA1UgeUuvuigSUhZBa 7qdQSihpelegmNGw2Xq4zY7LLUairtY4q7VLWcuLi33VCHzeiqHwlwBuey4xqizyvFtL 29M4TUfDirhQW8CGtmGMvKJpePWl+mQOC8jknFS3NXo7ziEm/FzV4dFNFu+/lRcAbr5S 1+TA== X-Gm-Message-State: AIkVDXKNmuCw8jH9T8tKT6B2svI3D8UE50OAKaCqv77X3Do69d2YAU/cu4wWek27y79H3g== X-Received: by 10.223.160.132 with SMTP id m4mr12127353wrm.116.1485586595347; Fri, 27 Jan 2017 22:56:35 -0800 (PST) Received: from thl530.multi.box (p57AED74C.dip0.t-ipconnect.de. [87.174.215.76]) by smtp.gmail.com with ESMTPSA id l67sm7397186wmf.1.2017.01.27.22.56.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Jan 2017 22:56:34 -0800 (PST) From: Thomas Huth To: Paolo Bonzini , qemu-devel@nongnu.org Date: Sat, 28 Jan 2017 07:56:22 +0100 Message-Id: <1485586582-6490-1-git-send-email-huth@tuxfamily.org> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 74.125.82.68 Subject: [Qemu-devel] [PATCH] hw/char/mcf_uart: QOMify the ColdFire UART X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Use type_init() etc. to adapt the ColdFire UART to the latest QEMU device conventions. Signed-off-by: Thomas Huth --- hw/char/mcf_uart.c | 102 +++++++++++++++++++++++++++++++++++++------------- hw/m68k/mcf5208.c | 6 +-- include/hw/m68k/mcf.h | 6 +-- 3 files changed, 81 insertions(+), 33 deletions(-) diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index ecaa091..20f0fef 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -7,12 +7,15 @@ */ #include "qemu/osdep.h" #include "hw/hw.h" +#include "hw/sysbus.h" #include "hw/m68k/mcf.h" #include "sysemu/char.h" #include "exec/address-spaces.h" #include "qapi/error.h" typedef struct { + SysBusDevice parent_obj; + MemoryRegion iomem; uint8_t mr[2]; uint8_t sr; @@ -30,6 +33,9 @@ typedef struct { CharBackend chr; } mcf_uart_state; +#define TYPE_MCF_UART "mcf-uart" +#define MCF_UART(obj) OBJECT_CHECK(mcf_uart_state, (obj), TYPE_MCF_UART) + /* UART Status Register bits. */ #define MCF_UART_RxRDY 0x01 #define MCF_UART_FFULL 0x02 @@ -220,8 +226,10 @@ void mcf_uart_write(void *opaque, hwaddr addr, mcf_uart_update(s); } -static void mcf_uart_reset(mcf_uart_state *s) +static void mcf_uart_reset(DeviceState *dev) { + mcf_uart_state *s = MCF_UART(dev); + s->fifo_len = 0; s->mr[0] = 0; s->mr[1] = 0; @@ -275,36 +283,80 @@ static void mcf_uart_receive(void *opaque, const uint8_t *buf, int size) mcf_uart_push_byte(s, buf[0]); } -void *mcf_uart_init(qemu_irq irq, CharDriverState *chr) -{ - mcf_uart_state *s; - - s = g_malloc0(sizeof(mcf_uart_state)); - s->irq = irq; - if (chr) { - qemu_chr_fe_init(&s->chr, chr, &error_abort); - qemu_chr_fe_set_handlers(&s->chr, mcf_uart_can_receive, - mcf_uart_receive, mcf_uart_event, - s, NULL, true); - } - mcf_uart_reset(s); - return s; -} - static const MemoryRegionOps mcf_uart_ops = { .read = mcf_uart_read, .write = mcf_uart_write, .endianness = DEVICE_NATIVE_ENDIAN, }; -void mcf_uart_mm_init(MemoryRegion *sysmem, - hwaddr base, - qemu_irq irq, - CharDriverState *chr) +static void mcf_uart_instance_init(Object *obj) +{ + SysBusDevice *dev = SYS_BUS_DEVICE(obj); + mcf_uart_state *s = MCF_UART(dev); + + memory_region_init_io(&s->iomem, obj, &mcf_uart_ops, s, "uart", 0x40); + sysbus_init_mmio(dev, &s->iomem); + + sysbus_init_irq(dev, &s->irq); +} + +static void mcf_uart_realize(DeviceState *dev, Error **errp) +{ + mcf_uart_state *s = MCF_UART(dev); + + qemu_chr_fe_set_handlers(&s->chr, mcf_uart_can_receive, mcf_uart_receive, + mcf_uart_event, s, NULL, true); +} + +static Property mcf_uart_properties[] = { + DEFINE_PROP_CHR("chardev", mcf_uart_state, chr), + DEFINE_PROP_END_OF_LIST(), +}; + +static void mcf_uart_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + + dc->realize = mcf_uart_realize; + dc->reset = mcf_uart_reset; + dc->props = mcf_uart_properties; + set_bit(DEVICE_CATEGORY_INPUT, dc->categories); +} + +static const TypeInfo mcf_uart_info = { + .name = TYPE_MCF_UART, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(mcf_uart_state), + .instance_init = mcf_uart_instance_init, + .class_init = mcf_uart_class_init, +}; + +static void mcf_uart_register(void) +{ + type_register_static(&mcf_uart_info); +} + +type_init(mcf_uart_register) + +void *mcf_uart_init(qemu_irq irq, CharDriverState *chrdrv) +{ + DeviceState *dev; + + dev = qdev_create(NULL, TYPE_MCF_UART); + if (chrdrv) { + qdev_prop_set_chr(dev, "chardev", chrdrv); + } + qdev_init_nofail(dev); + + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); + + return dev; +} + +void mcf_uart_mm_init(hwaddr base, qemu_irq irq, CharDriverState *chrdrv) { - mcf_uart_state *s; + DeviceState *dev; - s = mcf_uart_init(irq, chr); - memory_region_init_io(&s->iomem, NULL, &mcf_uart_ops, s, "uart", 0x40); - memory_region_add_subregion(sysmem, base, &s->iomem); + dev = mcf_uart_init(irq, chrdrv); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); } diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index bad1d33..6563518 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -255,9 +255,9 @@ static void mcf5208evb_init(MachineState *machine) /* Internal peripherals. */ pic = mcf_intc_init(address_space_mem, 0xfc048000, cpu); - mcf_uart_mm_init(address_space_mem, 0xfc060000, pic[26], serial_hds[0]); - mcf_uart_mm_init(address_space_mem, 0xfc064000, pic[27], serial_hds[1]); - mcf_uart_mm_init(address_space_mem, 0xfc068000, pic[28], serial_hds[2]); + mcf_uart_mm_init(0xfc060000, pic[26], serial_hds[0]); + mcf_uart_mm_init(0xfc064000, pic[27], serial_hds[1]); + mcf_uart_mm_init(0xfc068000, pic[28], serial_hds[2]); mcf5208_sys_init(address_space_mem, pic); diff --git a/include/hw/m68k/mcf.h b/include/hw/m68k/mcf.h index bf43998..0a14b29 100644 --- a/include/hw/m68k/mcf.h +++ b/include/hw/m68k/mcf.h @@ -4,17 +4,13 @@ #include "target/m68k/cpu-qom.h" -struct MemoryRegion; - /* mcf_uart.c */ uint64_t mcf_uart_read(void *opaque, hwaddr addr, unsigned size); void mcf_uart_write(void *opaque, hwaddr addr, uint64_t val, unsigned size); void *mcf_uart_init(qemu_irq irq, CharDriverState *chr); -void mcf_uart_mm_init(struct MemoryRegion *sysmem, - hwaddr base, - qemu_irq irq, CharDriverState *chr); +void mcf_uart_mm_init(hwaddr base, qemu_irq irq, CharDriverState *chr); /* mcf_intc.c */ qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,