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s=mail; t=1486141639; bh=gyIhXgrpIztPCsO6V7u8crpVs4ubKq1AFGiLiyP0GSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=vQcWtWl5aMhOhv18lmP9D7nuUem3HwRptACG0RGGl7U4jRavm4R3fKaRvitQOYmF+ rWHaomZIryy2gBlUlfiUY+fR+yRLjaWsFSdqL18Xp7jg8lDF30aBLBYS6awckkPyeP RN1c981OnZU3+am8ZlPfw1zCw5zNnzk8VcnlulNg= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=p6OKv+md; dkim=pass (1024-bit key) header.d=greensocs.com header.b=p6OKv+md Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xMierDo-pCwK; Fri, 3 Feb 2017 18:07:19 +0100 (CET) Received: by greensocs.com (Postfix, from userid 998) id E96B42E8DC5; Fri, 3 Feb 2017 18:07:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141638; bh=gyIhXgrpIztPCsO6V7u8crpVs4ubKq1AFGiLiyP0GSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=p6OKv+mdqFftHoN61VK0HVB7NZifCezmt34RMe+X+Job9pxjxRKfW7XXyf3qYpMx/ BDZTKMaCGVBuh72anJcYr8BnFO7Xr+v6VlPZqsmVLPg+uFN+D0NjBlZwNDxJGiwS3S 6TcUInWhhMftWA1mRhoe/plDjQvAIJXwFunoJrdU= Received: from corsair.home (bd231-7-88-127-3-24.fbx.proxad.net [88.127.3.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: fred.konrad@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id F0B1C24CEC6; Fri, 3 Feb 2017 18:07:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141638; bh=gyIhXgrpIztPCsO6V7u8crpVs4ubKq1AFGiLiyP0GSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=p6OKv+mdqFftHoN61VK0HVB7NZifCezmt34RMe+X+Job9pxjxRKfW7XXyf3qYpMx/ BDZTKMaCGVBuh72anJcYr8BnFO7Xr+v6VlPZqsmVLPg+uFN+D0NjBlZwNDxJGiwS3S 6TcUInWhhMftWA1mRhoe/plDjQvAIJXwFunoJrdU= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 18:06:34 +0100 Message-Id: <1486141597-13941-3-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> References: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC 2/5] cputlb: move get_page_addr_code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: KONRAD Frederic This just moves the code before VICTIM_TLB_HIT macro definition so we can use it. Signed-off-by: KONRAD Frederic --- cputlb.c | 72 ++++++++++++++++++++++++++++++++-------------------------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/cputlb.c b/cputlb.c index 665caea..b3a5f47 100644 --- a/cputlb.c +++ b/cputlb.c @@ -452,42 +452,6 @@ static void report_bad_exec(CPUState *cpu, target_ulong addr) log_cpu_state_mask(LOG_GUEST_ERROR, cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); } -/* NOTE: this function can trigger an exception */ -/* NOTE2: the returned address is not exactly the physical address: it - * is actually a ram_addr_t (in system mode; the user mode emulation - * version of this function returns a guest virtual address). - */ -tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) -{ - int mmu_idx, index, pd; - void *p; - MemoryRegion *mr; - CPUState *cpu = ENV_GET_CPU(env); - CPUIOTLBEntry *iotlbentry; - - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - mmu_idx = cpu_mmu_index(env, true); - if (unlikely(env->tlb_table[mmu_idx][index].addr_code != - (addr & TARGET_PAGE_MASK))) { - cpu_ldub_code(env, addr); - } - iotlbentry = &env->iotlb[mmu_idx][index]; - pd = iotlbentry->addr & ~TARGET_PAGE_MASK; - mr = iotlb_to_region(cpu, pd, iotlbentry->attrs); - if (memory_region_is_unassigned(mr)) { - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->do_unassigned_access) { - cc->do_unassigned_access(cpu, addr, false, true, 0, 4); - } else { - report_bad_exec(cpu, addr); - exit(1); - } - } - p = (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend); - return qemu_ram_addr_from_host_nofail(p); -} - static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry, target_ulong addr, uintptr_t retaddr, int size) { @@ -554,6 +518,42 @@ static bool victim_tlb_hit(CPUArchState *env, size_t mmu_idx, size_t index, victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \ (ADDR) & TARGET_PAGE_MASK) +/* NOTE: this function can trigger an exception */ +/* NOTE2: the returned address is not exactly the physical address: it + * is actually a ram_addr_t (in system mode; the user mode emulation + * version of this function returns a guest virtual address). + */ +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +{ + int mmu_idx, index, pd; + void *p; + MemoryRegion *mr; + CPUState *cpu = ENV_GET_CPU(env); + CPUIOTLBEntry *iotlbentry; + + index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx = cpu_mmu_index(env, true); + if (unlikely(env->tlb_table[mmu_idx][index].addr_code != + (addr & TARGET_PAGE_MASK))) { + cpu_ldub_code(env, addr); + } + iotlbentry = &env->iotlb[mmu_idx][index]; + pd = iotlbentry->addr & ~TARGET_PAGE_MASK; + mr = iotlb_to_region(cpu, pd, iotlbentry->attrs); + if (memory_region_is_unassigned(mr)) { + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->do_unassigned_access) { + cc->do_unassigned_access(cpu, addr, false, true, 0, 4); + } else { + report_bad_exec(cpu, addr); + exit(1); + } + } + p = (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend); + return qemu_ram_addr_from_host_nofail(p); +} + /* Probe for whether the specified guest write access is permitted. * If it is not permitted then an exception will be taken in the same * way as if this were a real write access (and we will not return).