From patchwork Sat Feb 4 02:17:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jose Ricardo Ziviani X-Patchwork-Id: 9555455 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C12BE604E2 for ; Sat, 4 Feb 2017 02:18:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC7F527D45 for ; Sat, 4 Feb 2017 02:18:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AE8AB280CF; Sat, 4 Feb 2017 02:18:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5731427D45 for ; Sat, 4 Feb 2017 02:18:36 +0000 (UTC) Received: from localhost ([::1]:37657 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZpvv-0003vG-Bg for patchwork-qemu-devel@patchwork.kernel.org; Fri, 03 Feb 2017 21:18:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42235) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZpvF-0003r7-B6 for qemu-devel@nongnu.org; Fri, 03 Feb 2017 21:17:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZpvC-0000ET-5D for qemu-devel@nongnu.org; Fri, 03 Feb 2017 21:17:53 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:48711) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cZpvB-0000E8-Ri for qemu-devel@nongnu.org; Fri, 03 Feb 2017 21:17:50 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v1428cWU085105 for ; Fri, 3 Feb 2017 21:17:48 -0500 Received: from e24smtp05.br.ibm.com (e24smtp05.br.ibm.com [32.104.18.26]) by mx0a-001b2d01.pphosted.com with ESMTP id 28cyk3tygd-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 03 Feb 2017 21:17:48 -0500 Received: from localhost by e24smtp05.br.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Sat, 4 Feb 2017 00:17:42 -0200 Received: from d24relay02.br.ibm.com (d24relay02.br.ibm.com [9.18.232.42]) by d24dlp02.br.ibm.com (Postfix) with ESMTP id 4903C1DC0054 for ; Fri, 3 Feb 2017 21:17:43 -0500 (EST) Received: from d24av05.br.ibm.com (d24av05.br.ibm.com [9.18.232.44]) by d24relay02.br.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v142HgjV37224528 for ; Sat, 4 Feb 2017 00:17:42 -0200 Received: from d24av05.br.ibm.com (localhost [127.0.0.1]) by d24av05.br.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v142HgQn012034 for ; Sat, 4 Feb 2017 00:17:42 -0200 Received: from pacoca.ibm.com ([9.85.131.14]) by d24av05.br.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v142HSw6011933; Sat, 4 Feb 2017 00:17:40 -0200 From: Jose Ricardo Ziviani To: qemu-devel@nongnu.org Date: Sat, 4 Feb 2017 00:17:19 -0200 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486174642-14883-1-git-send-email-joserz@linux.vnet.ibm.com> References: <1486174642-14883-1-git-send-email-joserz@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 17020402-0032-0000-0000-0000053B2724 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17020402-0033-0000-0000-000011BD4F1B Message-Id: <1486174642-14883-5-git-send-email-joserz@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-02-04_01:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1612050000 definitions=main-1702040023 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH Risu 4/7] risu_ppc64le: implement FP random data for test improvement X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, nikunj@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This commit replaces the simple FP data written for tests for a randomically generated one. This functionality stores the same data in FP register and VSX[VRB+32] registers. Signed-off-by: Jose Ricardo Ziviani --- risugen_ppc64.pm | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/risugen_ppc64.pm b/risugen_ppc64.pm index 561c17b..8e323a2 100644 --- a/risugen_ppc64.pm +++ b/risugen_ppc64.pm @@ -100,8 +100,39 @@ sub write_mov_ri($$) } } +sub write_mov_ri64($$) +{ + my ($imh, $iml) = @_; + + # number of bit to shift + write_mov_ri16(19, 31); + # load the highest 32 bits + write_mov_ri32(20, $iml); + # shift left 32 bits (sld r20, r20, r19 + insn32((0x1f << 26) | (20 << 21) | (20 << 16) | (19 << 11) | 0x36); + # write the lowest 32bits + write_mov_ri32(21, $imh); + # or r20, r20, r21 + insn32((0x1f << 26) | (20 << 21) | (20 << 16) | (21 << 11) | 0x378); + + # std r20, 16(r1) + insn32((0x3e << 26) | (20 << 21) | (1 << 16) | 0x10); +} + sub write_random_ppc64_fpdata() { + for (my $i = 0; $i < 32; $i++) { + # load a random doubleword value at r0 + write_mov_ri64(rand(0xfffff), rand(0xfffff)); + # since the EA is r1+16, load such value in FP reg + insn32((0x32 << 26) | ($i << 21) | (0x1 << 16) | 0x10); + insn32((0x39 << 26) | ($i << 21) | (0x1 << 16) | 0x12); + + } +} + +sub write_random_ppc64_fpdata_i() +{ # get an space from the stack insn32(0x3ac10020); # addi r22, r1, 32 insn32(0x3ee03ff0); # lis r23, 0x3ff0