From patchwork Fri Feb 10 05:25:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 9566009 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 388BB601EA for ; Fri, 10 Feb 2017 05:32:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 254CE2844A for ; Fri, 10 Feb 2017 05:32:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 18B4B2854F; Fri, 10 Feb 2017 05:32:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 52D762844A for ; Fri, 10 Feb 2017 05:32:36 +0000 (UTC) Received: from localhost ([::1]:41927 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cc3ox-0003KI-9z for patchwork-qemu-devel@patchwork.kernel.org; Fri, 10 Feb 2017 00:32:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40461) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cc3jK-0006jc-OZ for qemu-devel@nongnu.org; Fri, 10 Feb 2017 00:26:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cc3jJ-0001fR-Bq for qemu-devel@nongnu.org; Fri, 10 Feb 2017 00:26:46 -0500 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:35061) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cc3jE-0001cP-6F; Fri, 10 Feb 2017 00:26:40 -0500 Received: by mail-pf0-x243.google.com with SMTP id b145so842839pfb.2; Thu, 09 Feb 2017 21:26:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MYt8xoPEe8yQn2HdDyLf/JRAyvuGJHHUMuBBSsfGFOg=; b=ad3PO9BGu/gZNuqCHr/7b9XSzjbP67Oe79tuO5cqWh8gzKAOL5IHBkJZddmEzgFblj xA/3SypMGR0gx5epK0jhcc2H2fp2av+RN9jx6SrG2ZO6qX5fuWDZCeYW/rd7xrGQRMOC at8+WZ9cNYecmZ76Z8BOH30VHnaL1QT81BbddhTadBwFlSlDG1YGE6W+IYpEEY+OoTL6 9RmaAcm2SUc59pZ2uWMC/+eXotf7HsW2MYxZdyED/bc7O52bWY/Dr7yBbACpo56heLfR ZtVfzxWJM3jrkKsb/qOFXVsgMHaq1HPF11pMH+CnPDiSMs4OlJ1yP7gbVWa24fDUgqMC /oZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MYt8xoPEe8yQn2HdDyLf/JRAyvuGJHHUMuBBSsfGFOg=; b=uTmLCHu9VqED+QXmUsq975Q+SykypF6QbKMKbGbAEy43HGHT/+DLa6uVIMHDWvHE5R cdroOiTKDmqUBV2ur2Npjqdd7zR+ngeW4fDlzVX7Mq/FO8J77Krhn59F8YS+Waaei8Sn b2Y3cEn91qHVyot0VUT4jebHq3wnvsfMMcaZE00KBdxk7zc7kaiod1k/BEPAEHcDM2KD LDziD1w8eRNEgx6XcBpmaCA8thgI+H2yWteVTrV8C3KwtDoqNMchQwAcsRkb9U+wb6Hc fTpml/PXhW9h9fBl0cWaeKnQvy0ojMLw9Z2mJCzRMlm3bjSju+CLoqcIRY5WzvN1dxVg /H4Q== X-Gm-Message-State: AMke39l66HrK4jeOgAskkF53FiPExXn9nOfmX226x1MSMihTQBETmUczhSejQvIij6WUzA== X-Received: by 10.99.95.151 with SMTP id t145mr8298338pgb.75.1486704399169; Thu, 09 Feb 2017 21:26:39 -0800 (PST) Received: from surajjs.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id r78sm1308298pfl.63.2017.02.09.21.26.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Feb 2017 21:26:38 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Fri, 10 Feb 2017 16:25:57 +1100 Message-Id: <1486704360-27361-8-git-send-email-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1486704360-27361-1-git-send-email-sjitindarsingh@gmail.com> References: <1486704360-27361-1-git-send-email-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [QEMU-PPC] [PATCH V2 07/10] target/ppc/POWER9: Add POWER9 mmu fault handler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, Suraj Jitindar Singh , agraf@suse.de, sam.bobroff@au1.ibm.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add a new mmu fault handler for the POWER9 cpu and add it as the handler for the POWER9 cpu definition. This handler checks if the guest is radix or hash based on the value in the partition table entry and calls the correct fault handler accordingly. The hash fault handling code has also been updated to check if the partition is using segment tables. Currently only legacy hash (no segment tables) is supported. Signed-off-by: Suraj Jitindar Singh --- target/ppc/mmu-hash64.c | 9 ++++++++ target/ppc/mmu.h | 50 +++++++++++++++++++++++++++++++++++++++++++++ target/ppc/mmu_helper.c | 40 ++++++++++++++++++++++++++++++++++++ target/ppc/translate_init.c | 2 +- 4 files changed, 100 insertions(+), 1 deletion(-) create mode 100644 target/ppc/mmu.h diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index e658873..ada8876 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -27,6 +27,7 @@ #include "kvm_ppc.h" #include "mmu-hash64.h" #include "exec/log.h" +#include "mmu.h" //#define DEBUG_SLB @@ -766,6 +767,14 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, /* 2. Translation is on, so look up the SLB */ slb = slb_lookup(cpu, eaddr); if (!slb) { + /* No entry found, check if in-memory segment tables are in use */ + if (ppc64_use_proc_tbl(cpu)) { + /* TODO - Unsupported */ + qemu_log_mask(LOG_UNIMP, "%s: unimplemented - segment table support", + __func__); + /* Not much we can do here, generate a segment interrupt */ + } + /* Segment still not found, generate the appropriate interrupt */ if (rwx == 2) { cs->exception_index = POWERPC_EXCP_ISEG; env->error_code = 0; diff --git a/target/ppc/mmu.h b/target/ppc/mmu.h new file mode 100644 index 0000000..9375921 --- /dev/null +++ b/target/ppc/mmu.h @@ -0,0 +1,50 @@ +/* + * PowerPC emulation generic mmu definitions for qemu. + * + * Copyright (c) 2017 Suraj Jitindar Singh, IBM Corporation + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef MMU_H +#define MMU_H + +#ifndef CONFIG_USER_ONLY + +/* Partition Table Entry Fields */ +#define PATBE1_GR 0x8000000000000000 + +#ifdef TARGET_PPC64 + +static inline bool ppc64_use_proc_tbl(PowerPCCPU *cpu) +{ + return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT); +} + +static inline bool ppc64_radix_guest(PowerPCCPU *cpu) +{ + PPCVirtualHypervisorClass *vhc = + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + + return !!(vhc->get_patbe(cpu->vhyp) & PATBE1_GR); +} + +int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, + int mmu_idx); + +#endif /* TARGET_PPC64 */ + +#endif /* CONFIG_USER_ONLY */ + +#endif /* MMU_H */ diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index e893e72..71ad771 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -28,6 +28,8 @@ #include "exec/cpu_ldst.h" #include "exec/log.h" #include "helper_regs.h" +#include "qemu/error-report.h" +#include "mmu.h" //#define DEBUG_MMU //#define DEBUG_BATS @@ -1280,6 +1282,17 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env) case POWERPC_MMU_2_07a: dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); break; + case POWERPC_MMU_3_00: + if (ppc64_radix_guest(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + if (ppc64_use_proc_tbl(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); + break; + } + } #endif default: qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__); @@ -1421,6 +1434,17 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) case POWERPC_MMU_2_07: case POWERPC_MMU_2_07a: return ppc_hash64_get_phys_page_debug(cpu, addr); + case POWERPC_MMU_3_00: + if (ppc64_radix_guest(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + if (ppc64_use_proc_tbl(ppc_env_get_cpu(env))) { + /* TODO - Unsupported */ + } else { + return ppc_hash64_get_phys_page_debug(cpu, addr); + } + } + break; #endif case POWERPC_MMU_32B: @@ -2913,3 +2937,19 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, retaddr); } } + +/******************************************************************************/ + +/* ISA v3.00 (POWER9) Generic MMU Helpers */ + +int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, + int mmu_idx) +{ + if (ppc64_radix_guest(cpu)) { /* Guest uses radix */ + /* TODO - Unsupported */ + error_report("Guest Radix Support Unimplemented"); + abort(); + } else { /* Guest uses hash */ + return ppc_hash64_handle_mmu_fault(cpu, eaddr, rwx, mmu_idx); + } +} diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index f401d31..a3a23d8 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8829,7 +8829,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) (1ull << MSR_LE); pcc->mmu_model = POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; + pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; /* segment page size remain the same */ pcc->sps = &POWER7_POWER8_sps; #endif