From patchwork Mon Feb 27 13:12:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Apfelbaum X-Patchwork-Id: 9593141 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D429460453 for ; Mon, 27 Feb 2017 13:17:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C057B27D4D for ; Mon, 27 Feb 2017 13:17:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B44E327F17; Mon, 27 Feb 2017 13:17:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 47AFC27D4D for ; Mon, 27 Feb 2017 13:17:09 +0000 (UTC) Received: from localhost ([::1]:52550 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ciLAq-0005JL-AS for patchwork-qemu-devel@patchwork.kernel.org; Mon, 27 Feb 2017 08:17:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43529) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ciL6T-0002DJ-KT for qemu-devel@nongnu.org; Mon, 27 Feb 2017 08:12:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ciL6O-00009T-NO for qemu-devel@nongnu.org; Mon, 27 Feb 2017 08:12:37 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48648) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ciL6O-00008c-Ez for qemu-devel@nongnu.org; Mon, 27 Feb 2017 08:12:32 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E89948124D for ; Mon, 27 Feb 2017 13:12:31 +0000 (UTC) Received: from work.redhat.com (ovpn-116-91.ams2.redhat.com [10.36.116.91]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v1RDCS6x027460; Mon, 27 Feb 2017 08:12:29 -0500 From: Marcel Apfelbaum To: qemu-devel@nongnu.org Date: Mon, 27 Feb 2017 15:12:26 +0200 Message-Id: <1488201146-19580-1-git-send-email-marcel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 27 Feb 2017 13:12:31 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH V3] hw/pxb-pcie: fix PCI Express hotplug support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marcel@redhat.com, imammedo@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the missing osc method for pxb-pcie devices as APCI spec recommends, see 6.2.10.3 OSC Implementation Example for PCI Host Bridge Devices, ACPI 5.0: It is recommended that a machine with multiple host bridge devices should report the same capabilities for all host bridges, and also negotiate control of the features described in the Control Field in the same way for all host bridges. Reviewed-by: Igor Mammedov Signed-off-by: Marcel Apfelbaum --- Note to maintainer: Please update ACPI test files. V2 -> V3: - Modified comment (Igor) V1 -> V2: Addressed Michael S. Tsirkin's comments: - Added documentation to q35 osc function - Made _osc serialized. I did not add compat property since it seems guest OSs do not care anyway about the OSC being serialized. - Kept the SUPP field even if is not used and also left both SUPP and CTRL out of the _osc because all systems I checked and the ACPI spec keep them that way, maybe is some kind of documentation contract. Thanks, Marcel hw/i386/acpi-build.c | 41 +++++++++++++++++++++++++++++++++++------ 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 1c928ab..ad3f233 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1796,7 +1796,7 @@ static void build_piix4_pci_hotplug(Aml *table) aml_append(table, scope); } -static Aml *build_q35_osc_method(void) +static void build_q35_osc_method(Aml *dev) { Aml *if_ctx; Aml *if_ctx2; @@ -1805,7 +1805,35 @@ static Aml *build_q35_osc_method(void) Aml *a_cwd1 = aml_name("CDW1"); Aml *a_ctrl = aml_name("CTRL"); - method = aml_method("_OSC", 4, AML_NOTSERIALIZED); + /* + * Bits defined in the Support Field provide information + * regarding OS supported features. + * + * This field is not actually used and can be removed, + * however it appears even if unused on most DSDTs. + * + * See: + * Table 6-148 Interpretation of _OSC Support Field, + * Passed in via the 2nd dword in Arg3, APCI 5.0 + */ + aml_append(dev, aml_name_decl("SUPP", aml_int(0))); + + /* + * Bits defined in the Control Field are used to submit + * request by the OS for control/handling of the associated feature + * + * See: Table 6-149 Interpretation of _OSC Control Field, + * Passed in via Arg3, ACPI 5.0 + * Table 6-150 Interpretation of _OSC Control Field, + * Returned Value, APCI 5.0 + */ + aml_append(dev, aml_name_decl("CTRL", aml_int(0))); + + + /* + * 6.2.10 _OSC (Operating System Capabilities), APCI 5.0 + */ + method = aml_method("_OSC", 4, AML_SERIALIZED); aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); if_ctx = aml_if(aml_equal( @@ -1842,7 +1870,7 @@ static Aml *build_q35_osc_method(void) aml_append(method, else_ctx); aml_append(method, aml_return(aml_arg(3))); - return method; + aml_append(dev, method); } static void @@ -1898,9 +1926,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); aml_append(dev, aml_name_decl("_ADR", aml_int(0))); aml_append(dev, aml_name_decl("_UID", aml_int(1))); - aml_append(dev, aml_name_decl("SUPP", aml_int(0))); - aml_append(dev, aml_name_decl("CTRL", aml_int(0))); - aml_append(dev, build_q35_osc_method()); + build_q35_osc_method(dev); aml_append(sb_scope, dev); aml_append(dsdt, sb_scope); @@ -1964,6 +1990,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_UID", aml_int(bus_num))); aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03"))); aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num))); + if (pci_bus_is_express(bus)) { + build_q35_osc_method(dev); + } if (numa_node != NUMA_NODE_UNASSIGNED) { aml_append(dev, aml_name_decl("_PXM", aml_int(numa_node)));