From patchwork Fri Mar 17 11:29:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9630421 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6B2A060249 for ; Fri, 17 Mar 2017 11:37:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 54CF0284E9 for ; Fri, 17 Mar 2017 11:37:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 496E32862B; Fri, 17 Mar 2017 11:37:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C1C15284E9 for ; Fri, 17 Mar 2017 11:37:28 +0000 (UTC) Received: from localhost ([::1]:48375 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqCF-0003rg-SP for patchwork-qemu-devel@patchwork.kernel.org; Fri, 17 Mar 2017 07:37:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56867) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqBt-0003oT-KO for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coqBs-0007Dy-Lq for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:05 -0400 Received: from mga04.intel.com ([192.55.52.120]:37369) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coqBs-0007DC-9m for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489750624; x=1521286624; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=jqV/ruj5d6LzkA6SfRc3tg9uH9kQ3eeC6CX6Orkw+eM=; b=KfmN0GUPFXWV7wDIzgGW/0k3bYVnnbAqWIkSyU7f3tG7LPaUYUO+xOWL VHMwodgZ0gobioMU/7wxcYhyr6FISA==; Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Mar 2017 04:37:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,176,1486454400"; d="scan'208";a="77573860" Received: from lantianyu-ws.sh.intel.com (HELO localhost) ([10.239.159.159]) by fmsmga005.fm.intel.com with ESMTP; 17 Mar 2017 04:36:59 -0700 From: Lan Tianyu To: xen-devel@lists.xensource.com, qemu-devel@nongnu.org Date: Fri, 17 Mar 2017 19:29:16 +0800 Message-Id: <1489750157-17401-4-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> References: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [RFC PATCH 3/4] xen-pt: bind/unbind interrupt remapping format MSI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, mst@redhat.com, anthony.perard@citrix.com, chao.gao@intel.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Gao If a vIOMMU is exposed to guest, guest will configure the msi to remapping format. The original code isn't suitable to the new format. A new pair bind/unbind interfaces are added for this usage. This patch recognizes this case and use new interfaces to bind/unbind msi. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- hw/xen/xen_pt_msi.c | 36 ++++++++++++++++++++++++++++-------- include/hw/i386/apic-msidef.h | 1 + 2 files changed, 29 insertions(+), 8 deletions(-) diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 62add06..8b0d7fc 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -161,6 +161,7 @@ static int msi_msix_update(XenPCIPassthroughState *s, uint8_t gvec = msi_vector(data); uint32_t gflags = msi_gflags(data, addr); int rc = 0; + bool ir = !!(addr & MSI_ADDR_IM_MASK); uint64_t table_addr = 0; XEN_PT_LOG(d, "Updating MSI%s with pirq %d gvec %#x gflags %#x" @@ -171,8 +172,14 @@ static int msi_msix_update(XenPCIPassthroughState *s, table_addr = s->msix->mmio_base_addr; } - rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, + if (ir) { + rc = xc_domain_update_msi_irq_remapping(xen_xc, xen_domid, pirq, + d->devfn, data, addr, table_addr); + } + else { + rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags, table_addr); + } if (rc) { XEN_PT_ERR(d, "Updating of MSI%s failed. (err: %d)\n", @@ -204,13 +211,26 @@ static int msi_msix_disable(XenPCIPassthroughState *s, } if (is_binded) { - XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", - is_msix ? "-X" : "", pirq, gvec); - rc = xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags); - if (rc) { - XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, gvec: %#x)\n", - is_msix ? "-X" : "", errno, pirq, gvec); - return rc; + if ( addr & MSI_ADDR_IM_MASK ) { + XEN_PT_LOG(d, "Unbinding of MSI%s . ( pirq: %d, data: %x, addr: %lx)\n", + is_msix ? "-X" : "", pirq, data, addr); + rc = xc_domain_unbind_msi_irq_remapping(xen_xc, xen_domid, pirq, + d->devfn, data, addr); + if (rc) { + XEN_PT_ERR(d, "Unbinding of MSI%s . (error: %d, pirq: %d, data: %x, addr: %lx)\n", + is_msix ? "-X" : "", rc, pirq, data, addr); + return rc; + } + + } else { + XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", + is_msix ? "-X" : "", pirq, gvec); + rc = xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags); + if (rc) { + XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, gvec: %#x)\n", + is_msix ? "-X" : "", errno, pirq, gvec); + return rc; + } } } diff --git a/include/hw/i386/apic-msidef.h b/include/hw/i386/apic-msidef.h index 8b4d4cc..08b584f 100644 --- a/include/hw/i386/apic-msidef.h +++ b/include/hw/i386/apic-msidef.h @@ -27,5 +27,6 @@ #define MSI_ADDR_DEST_ID_SHIFT 12 #define MSI_ADDR_DEST_IDX_SHIFT 4 #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 +#define MSI_ADDR_IM_MASK 0x00000010 #endif /* HW_APIC_MSIDEF_H */