From patchwork Wed Apr 5 08:35:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 9663271 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8765D602B8 for ; Wed, 5 Apr 2017 08:46:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76AC42859A for ; Wed, 5 Apr 2017 08:46:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6B8DF2859E; Wed, 5 Apr 2017 08:46:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C7EDA285A3 for ; Wed, 5 Apr 2017 08:46:35 +0000 (UTC) Received: from localhost ([::1]:39364 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cvgaI-0001Uy-Vm for patchwork-qemu-devel@patchwork.kernel.org; Wed, 05 Apr 2017 04:46:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59794) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cvgWJ-0007of-0l for qemu-devel@nongnu.org; Wed, 05 Apr 2017 04:42:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cvgWF-0008Vm-1c for qemu-devel@nongnu.org; Wed, 05 Apr 2017 04:42:27 -0400 Received: from chuckie.co.uk ([82.165.15.123]:42869 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cvgWE-0008Us-ML for qemu-devel@nongnu.org; Wed, 05 Apr 2017 04:42:22 -0400 Received: from host86-184-243-30.range86-184.btcentralplus.com ([86.184.243.30] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1cvgQA-0001ob-9L; Wed, 05 Apr 2017 09:36:07 +0100 From: Mark Cave-Ayland To: kraxel@redhat.com, qemu-devel@nongnu.org Date: Wed, 5 Apr 2017 09:35:27 +0100 Message-Id: <1491381329-3995-13-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1491381329-3995-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1491381329-3995-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.184.243.30 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 12/14] tcx: remove primitives for non-32-bit surfaces X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP As all surfaces in QEMU are now either shared or 32-bit ARGB regardless of the guest depth, remove all non-32-bit primitives from tcx_update_display() and consequence their implementation which are no longer required. Signed-off-by: Mark Cave-Ayland --- hw/display/tcx.c | 126 ++++-------------------------------------------------- 1 file changed, 8 insertions(+), 118 deletions(-) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 0dd007e..6da6dfb 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -140,25 +140,12 @@ static void update_palette_entries(TCXState *s, int start, int end) int i; for (i = start; i < end; i++) { - switch (surface_bits_per_pixel(surface)) { - default: - case 8: - s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]); - break; - case 15: - s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]); - break; - case 16: - s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]); - break; - case 32: - if (is_surface_bgr(surface)) { - s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); - } else { - s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); - } - break; + if (is_surface_bgr(surface)) { + s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); + } else { + s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); } + break; } tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); } @@ -176,31 +163,6 @@ static void tcx_draw_line32(TCXState *s1, uint8_t *d, } } -static void tcx_draw_line16(TCXState *s1, uint8_t *d, - const uint8_t *s, int width) -{ - int x; - uint8_t val; - uint16_t *p = (uint16_t *)d; - - for (x = 0; x < width; x++) { - val = *s++; - *p++ = s1->palette[val]; - } -} - -static void tcx_draw_line8(TCXState *s1, uint8_t *d, - const uint8_t *s, int width) -{ - int x; - uint8_t val; - - for(x = 0; x < width; x++) { - val = *s++; - *d++ = s1->palette[val]; - } -} - static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, int y, int width) { @@ -227,57 +189,6 @@ static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, } } -static void tcx_draw_cursor16(TCXState *s1, uint8_t *d, - int y, int width) -{ - int x, len; - uint32_t mask, bits; - uint16_t *p = (uint16_t *)d; - - y = y - s1->cursy; - mask = s1->cursmask[y]; - bits = s1->cursbits[y]; - len = MIN(width - s1->cursx, 32); - p = &p[s1->cursx]; - for (x = 0; x < len; x++) { - if (mask & 0x80000000) { - if (bits & 0x80000000) { - *p = s1->palette[259]; - } else { - *p = s1->palette[258]; - } - } - p++; - mask <<= 1; - bits <<= 1; - } -} - -static void tcx_draw_cursor8(TCXState *s1, uint8_t *d, - int y, int width) -{ - int x, len; - uint32_t mask, bits; - - y = y - s1->cursy; - mask = s1->cursmask[y]; - bits = s1->cursbits[y]; - len = MIN(width - s1->cursx, 32); - d = &d[s1->cursx]; - for (x = 0; x < len; x++) { - if (mask & 0x80000000) { - if (bits & 0x80000000) { - *d = s1->palette[259]; - } else { - *d = s1->palette[258]; - } - } - d++; - mask <<= 1; - bits <<= 1; - } -} - /* XXX Could be much more optimal: * detect if line/page/whole screen is in 24 bit mode @@ -326,10 +237,8 @@ static void tcx_update_display(void *opaque) ram_addr_t page, page_min, page_max; int y, y_start, dd, ds; uint8_t *d, *s; - void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); - void (*fc)(TCXState *s1, uint8_t *dst, int y, int width); - if (surface_bits_per_pixel(surface) == 0) { + if (surface_bits_per_pixel(surface) != 32) { return; } @@ -342,25 +251,6 @@ static void tcx_update_display(void *opaque) dd = surface_stride(surface); ds = 1024; - switch (surface_bits_per_pixel(surface)) { - case 32: - f = tcx_draw_line32; - fc = tcx_draw_cursor32; - break; - case 15: - case 16: - f = tcx_draw_line16; - fc = tcx_draw_cursor16; - break; - default: - case 8: - f = tcx_draw_line8; - fc = tcx_draw_cursor8; - break; - case 0: - return; - } - memory_region_sync_dirty_bitmap(&ts->vram_mem); for (y = 0; y < ts->height; y++, page += ds) { if (tcx_check_dirty(ts, page, ds)) { @@ -371,9 +261,9 @@ static void tcx_update_display(void *opaque) if (page > page_max) page_max = page; - f(ts, d, s, ts->width); + tcx_draw_line32(ts, d, s, ts->width); if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); + tcx_draw_cursor32(ts, d, y, ts->width); } } else { if (y_start >= 0) {