From patchwork Wed Apr 26 10:12:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Liu X-Patchwork-Id: 9701075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5EF0B60245 for ; Wed, 26 Apr 2017 10:46:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E1AC2521E for ; Wed, 26 Apr 2017 10:46:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 42D2828459; Wed, 26 Apr 2017 10:46:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B7F492521E for ; Wed, 26 Apr 2017 10:46:44 +0000 (UTC) Received: from localhost ([::1]:54188 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KT5-0005Vj-Fj for patchwork-qemu-devel@patchwork.kernel.org; Wed, 26 Apr 2017 06:46:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52065) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBa-000763-4S for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBY-0004Qs-Vc for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:38 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBY-0004JF-I3 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:36 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80991998" Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:33 -0700 From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:01 +0800 Message-Id: <1493201525-14418-5-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 4/8] iommu/vt-d: Add iommu do invalidate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, Jacob Pan , jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Jacob Pan This patch adds Intel VT-d specific function to implement iommu_do_invalidate API. The use case is for supporting caching structure invalidation of assigned SVM capable devices. Emulated IOMMU exposes queue invalidation capability and passes down all descriptors from the guest to the physical IOMMU. The assumption is that guest to host device ID mapping should be resolved prior to calling IOMMU driver. Based on the device handle, host IOMMU driver can replace certain fields before submit to the invalidation queue. Signed-off-by: Liu, Yi L Signed-off-by: Jacob Pan --- drivers/iommu/intel-iommu.c | 43 +++++++++++++++++++++++++++++++++++++++++++ include/linux/intel-iommu.h | 11 +++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 6d5b939..0b098ad 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -5042,6 +5042,48 @@ static void intel_iommu_detach_device(struct iommu_domain *domain, dmar_remove_one_dev_info(to_dmar_domain(domain), dev); } +static int intel_iommu_do_invalidate(struct iommu_domain *domain, + struct device *dev, struct tlb_invalidate_info *inv_info) +{ + int ret = 0; + struct intel_iommu *iommu; + struct dmar_domain *dmar_domain = to_dmar_domain(domain); + struct intel_invalidate_data *inv_data; + struct qi_desc *qi; + u16 did; + u8 bus, devfn; + + if (!inv_info || !dmar_domain || (inv_info->model != INTEL_IOMMU)) + return -EINVAL; + + iommu = device_to_iommu(dev, &bus, &devfn); + if (!iommu) + return -ENODEV; + + inv_data = (struct intel_invalidate_data *)&inv_info->opaque; + + /* check SID */ + if (PCI_DEVID(bus, devfn) != inv_data->sid) + return 0; + + qi = &inv_data->inv_desc; + + switch (qi->low & QI_TYPE_MASK) { + case QI_DIOTLB_TYPE: + case QI_DEIOTLB_TYPE: + /* for device IOTLB, we just let it pass through */ + break; + default: + did = dmar_domain->iommu_did[iommu->seq_id]; + set_mask_bits(&qi->low, QI_DID_MASK, QI_DID(did)); + break; + } + + ret = qi_submit_sync(qi, iommu); + + return ret; +} + static int intel_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t hpa, size_t size, int iommu_prot) @@ -5416,6 +5458,7 @@ static int intel_iommu_unbind_pasid_table(struct iommu_domain *domain, #ifdef CONFIG_INTEL_IOMMU_SVM .bind_pasid_table = intel_iommu_bind_pasid_table, .unbind_pasid_table = intel_iommu_unbind_pasid_table, + .do_invalidate = intel_iommu_do_invalidate, #endif .map = intel_iommu_map, .unmap = intel_iommu_unmap, diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index ac04f28..9d6562c 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -271,6 +272,10 @@ enum { #define QI_PGRP_RESP_TYPE 0x9 #define QI_PSTRM_RESP_TYPE 0xa +#define QI_DID(did) (((u64)did & 0xffff) << 16) +#define QI_DID_MASK GENMASK(31, 16) +#define QI_TYPE_MASK GENMASK(3, 0) + #define QI_IEC_SELECTIVE (((u64)1) << 4) #define QI_IEC_IIDEX(idx) (((u64)(idx & 0xffff) << 32)) #define QI_IEC_IM(m) (((u64)(m & 0x1f) << 27)) @@ -529,6 +534,12 @@ struct intel_svm { extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev); #endif +struct intel_invalidate_data { + u16 sid; + u32 pasid; + struct qi_desc inv_desc; +}; + extern const struct attribute_group *intel_iommu_groups[]; extern void intel_iommu_debugfs_init(void); extern struct context_entry *iommu_context_addr(struct intel_iommu *iommu,