From patchwork Thu May 18 05:32:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9733839 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A99CF601BC for ; Thu, 18 May 2017 11:40:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 98C9D28777 for ; Thu, 18 May 2017 11:40:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8D9F72879C; Thu, 18 May 2017 11:40:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 133D328777 for ; Thu, 18 May 2017 11:40:54 +0000 (UTC) Received: from localhost ([::1]:53125 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dBJna-0006iz-4K for patchwork-qemu-devel@patchwork.kernel.org; Thu, 18 May 2017 07:40:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dBJlD-0005lO-RJ for qemu-devel@nongnu.org; Thu, 18 May 2017 07:38:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dBJl8-00013e-RR for qemu-devel@nongnu.org; Thu, 18 May 2017 07:38:27 -0400 Received: from mga07.intel.com ([134.134.136.100]:23205) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dBJl8-000139-Hi for qemu-devel@nongnu.org; Thu, 18 May 2017 07:38:22 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP; 18 May 2017 04:38:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.38,358,1491289200"; d="scan'208"; a="1149658724" Received: from sky-ws.sh.intel.com (HELO localhost) ([10.239.48.124]) by fmsmga001.fm.intel.com with ESMTP; 18 May 2017 04:38:08 -0700 From: Lan Tianyu To: qemu-devel@nongnu.org, xen-devel@lists.xenproject.org Date: Thu, 18 May 2017 01:32:59 -0400 Message-Id: <1495085580-10631-2-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1495085580-10631-1-git-send-email-tianyu.lan@intel.com> References: <1495085580-10631-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.100 Subject: [Qemu-devel] [RFC PATCH V2 1/2] xen-pt: bind/unbind interrupt remapping format MSI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, mst@redhat.com, anthony.perard@citrix.com, marcel@redhat.com, Chao Gao Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Gao If a vIOMMU is exposed to guest, guest will configure the msi to remapping format. The original code isn't suitable to the new format. A new pair bind/unbind interfaces are added for this usage. This patch recognizes this case and use new interfaces to bind/unbind msi. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- hw/xen/xen_pt_msi.c | 50 ++++++++++++++++++++++++++++++++----------- include/hw/i386/apic-msidef.h | 3 ++- 2 files changed, 39 insertions(+), 14 deletions(-) diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 62add06..5fab95e 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -163,16 +163,24 @@ static int msi_msix_update(XenPCIPassthroughState *s, int rc = 0; uint64_t table_addr = 0; - XEN_PT_LOG(d, "Updating MSI%s with pirq %d gvec %#x gflags %#x" - " (entry: %#x)\n", - is_msix ? "-X" : "", pirq, gvec, gflags, msix_entry); - if (is_msix) { table_addr = s->msix->mmio_base_addr; } - rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, - pirq, gflags, table_addr); + if (addr & MSI_ADDR_IF_MASK) { + XEN_PT_LOG(d, "Updating MSI%s with addr %#" PRIx64 "data %#x\n", + is_msix ? "-X": "", addr, data); + rc = xc_domain_update_msi_irq_remapping(xen_xc, xen_domid, pirq, + d->devfn, data, addr, table_addr); + } + else { + XEN_PT_LOG(d, "Updating MSI%s with pirq %d gvec %#x gflags %#x" + " (entry: %#x)\n", + is_msix ? "-X" : "", pirq, gvec, gflags, msix_entry); + + rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, + pirq, gflags, table_addr); + } if (rc) { XEN_PT_ERR(d, "Updating of MSI%s failed. (err: %d)\n", @@ -204,13 +212,29 @@ static int msi_msix_disable(XenPCIPassthroughState *s, } if (is_binded) { - XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", - is_msix ? "-X" : "", pirq, gvec); - rc = xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags); - if (rc) { - XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, gvec: %#x)\n", - is_msix ? "-X" : "", errno, pirq, gvec); - return rc; + if ( addr & MSI_ADDR_IF_MASK ) { + XEN_PT_LOG(d, "Unbinding of MSI%s . ( pirq: %d, data: %x, " + "addr: %#" PRIx64 ")\n", + is_msix ? "-X" : "", pirq, data, addr); + rc = xc_domain_unbind_msi_irq_remapping(xen_xc, xen_domid, pirq, + d->devfn, data, addr); + if (rc) { + XEN_PT_ERR(d, "Unbinding of MSI%s . (error: %d, pirq: %d, " + "data: %x, addr: %#" PRIx64 ")\n", + is_msix ? "-X" : "", rc, pirq, data, addr); + return rc; + } + + } else { + XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", + is_msix ? "-X" : "", pirq, gvec); + rc = xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags); + if (rc) { + XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, " + "gvec: %#x)\n", + is_msix ? "-X" : "", errno, pirq, gvec); + return rc; + } } } diff --git a/include/hw/i386/apic-msidef.h b/include/hw/i386/apic-msidef.h index 8b4d4cc..2c450f9 100644 --- a/include/hw/i386/apic-msidef.h +++ b/include/hw/i386/apic-msidef.h @@ -26,6 +26,7 @@ #define MSI_ADDR_DEST_ID_SHIFT 12 #define MSI_ADDR_DEST_IDX_SHIFT 4 -#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 +#define MSI_ADDR_DEST_ID_MASK 0x000fff00 +#define MSI_ADDR_IF_MASK 0x00000010 #endif /* HW_APIC_MSIDEF_H */