From patchwork Wed Jun 21 10:19:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Zhong X-Patchwork-Id: 9801437 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3DEB660329 for ; Wed, 21 Jun 2017 10:24:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D1892858E for ; Wed, 21 Jun 2017 10:24:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 202C228595; Wed, 21 Jun 2017 10:24:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8DA4C2858E for ; Wed, 21 Jun 2017 10:24:15 +0000 (UTC) Received: from localhost ([::1]:52892 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNco2-0005AC-I4 for patchwork-qemu-devel@patchwork.kernel.org; Wed, 21 Jun 2017 06:24:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55833) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNckS-0002Xm-2x for qemu-devel@nongnu.org; Wed, 21 Jun 2017 06:20:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNckR-000596-3I for qemu-devel@nongnu.org; Wed, 21 Jun 2017 06:20:32 -0400 Received: from mga14.intel.com ([192.55.52.115]:6553) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dNckQ-0004zB-Q2 for qemu-devel@nongnu.org; Wed, 21 Jun 2017 06:20:31 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Jun 2017 03:20:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,368,1493708400"; d="scan'208";a="983451118" Received: from yangzhon-virtual.bj.intel.com ([10.238.145.52]) by orsmga003.jf.intel.com with ESMTP; 21 Jun 2017 03:20:28 -0700 From: Yang Zhong To: pbonzini@redhat.com Date: Wed, 21 Jun 2017 18:19:54 +0800 Message-Id: <1498040401-16361-9-git-send-email-yang.zhong@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1498040401-16361-1-git-send-email-yang.zhong@intel.com> References: <1498040401-16361-1-git-send-email-yang.zhong@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Subject: [Qemu-devel] [PATCH 08/15] tcg: make cpu_get_fp80()/cpu_set_fp80() static X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Zhong , anthony.xu@intel.com, qemu-devel@nongnu.org, a.rigo@virtualopensystems.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Move cpu_get_fp80()/cpu_set_fp80() from fpu_helper.c to machine.c because fpu_helper.c will be disabled if tcg is disabled in the build. Signed-off-by: Yang Zhong --- target/i386/cpu.h | 2 -- target/i386/fpu_helper.c | 18 ------------------ target/i386/machine.c | 18 ++++++++++++++++++ 3 files changed, 18 insertions(+), 20 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index de0551f..8b3b535 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1418,8 +1418,6 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, /* op_helper.c */ /* used for debug or cpu save/restore */ -void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f); -floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper); /* cpu-exec.c */ /* the following helpers are only usable in user mode simulation as diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 69ea33a..34fb5fc 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -1539,24 +1539,6 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask) raise_exception_ra(env, EXCP0D_GPF, GETPC()); } -void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f) -{ - CPU_LDoubleU temp; - - temp.d = f; - *pmant = temp.l.lower; - *pexp = temp.l.upper; -} - -floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper) -{ - CPU_LDoubleU temp; - - temp.l.upper = upper; - temp.l.lower = mant; - return temp.d; -} - /* MMX/SSE */ /* XXX: optimize by storing fptt and fptags in the static cpu state */ diff --git a/target/i386/machine.c b/target/i386/machine.c index 8c7a822..53587ae 100644 --- a/target/i386/machine.c +++ b/target/i386/machine.c @@ -142,6 +142,24 @@ typedef struct x86_FPReg_tmp { uint16_t tmp_exp; } x86_FPReg_tmp; +static void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f) +{ + CPU_LDoubleU temp; + + temp.d = f; + *pmant = temp.l.lower; + *pexp = temp.l.upper; +} + +static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper) +{ + CPU_LDoubleU temp; + + temp.l.upper = upper; + temp.l.lower = mant; + return temp.d; +} + static void fpreg_pre_save(void *opaque) { x86_FPReg_tmp *tmp = opaque;