From patchwork Sun Jun 25 09:40:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 9808021 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7948860382 for ; Sun, 25 Jun 2017 09:41:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 63D8F27C05 for ; Sun, 25 Jun 2017 09:41:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 567C7285E9; Sun, 25 Jun 2017 09:41:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9898C27C05 for ; Sun, 25 Jun 2017 09:41:04 +0000 (UTC) Received: from localhost ([::1]:41847 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dP42R-0002Ur-Ol for patchwork-qemu-devel@patchwork.kernel.org; Sun, 25 Jun 2017 05:41:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33869) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dP41q-0002Ul-6i for qemu-devel@nongnu.org; Sun, 25 Jun 2017 05:40:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dP41n-0001YI-4u for qemu-devel@nongnu.org; Sun, 25 Jun 2017 05:40:26 -0400 Received: from roura.ac.upc.edu ([147.83.33.10]:40628 helo=roura.ac.upc.es) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dP41m-0001Y5-Kv for qemu-devel@nongnu.org; Sun, 25 Jun 2017 05:40:23 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v5P9eKFk019926; Sun, 25 Jun 2017 11:40:20 +0200 Received: from localhost (unknown [132.68.53.125]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id 4D5335E; Sun, 25 Jun 2017 11:40:15 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 25 Jun 2017 12:40:14 +0300 Message-Id: <149838361402.6497.4595687907654582323.stgit@frigg.lan> X-Mailer: git-send-email 2.11.0 In-Reply-To: <149838022308.6497.2104916050645246693.stgit@frigg.lan> References: <149838022308.6497.2104916050645246693.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v5P9eKFk019926 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v9 14/26] target: [tcg, i386] Replace DISAS_* with DJ_* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Peter Crosthwaite , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova --- target/i386/translate.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 5e426de947..c7bb6efbf5 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -71,6 +71,9 @@ case (2 << 6) | (OP << 3) | 0 ... (2 << 6) | (OP << 3) | 7: \ case (3 << 6) | (OP << 3) | 0 ... (3 << 6) | (OP << 3) | 7 +#define DJ_JUMP (DJ_TARGET + 0) /* end of block due to call/jump */ +#define DJ_MISC (DJ_TARGET + 1) /* some other reason */ + //#define MACRO_TEST 1 /* global register indexes */ @@ -2180,7 +2183,7 @@ static inline void gen_jcc(DisasContext *s, int b, gen_set_label(l1); gen_goto_tb(s, 1, val); - s->base.is_jmp = DISAS_TB_JUMP; + s->base.is_jmp = DJ_JUMP; } else { l1 = gen_new_label(); l2 = gen_new_label(); @@ -2253,11 +2256,11 @@ static void gen_movl_seg_T0(DisasContext *s, int seg_reg) stop as a special handling must be done to disable hardware interrupts for the next instruction */ if (seg_reg == R_SS || (s->code32 && seg_reg < R_FS)) - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } else { gen_op_movl_seg_T0_vm(seg_reg); if (seg_reg == R_SS) - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } } @@ -2431,7 +2434,7 @@ static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip) gen_update_cc_op(s); gen_jmp_im(cur_eip); gen_helper_raise_exception(cpu_env, tcg_const_i32(trapno)); - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } /* Generate #UD for the current instruction. The assumption here is that @@ -2471,7 +2474,7 @@ static void gen_interrupt(DisasContext *s, int intno, gen_jmp_im(cur_eip); gen_helper_raise_interrupt(cpu_env, tcg_const_i32(intno), tcg_const_i32(next_eip - cur_eip)); - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } static void gen_debug(DisasContext *s, target_ulong cur_eip) @@ -2481,7 +2484,7 @@ static void gen_debug(DisasContext *s, target_ulong cur_eip) gen_update_cc_op(s); gen_jmp_im(cur_eip); gen_helper_debug(cpu_env); - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } static void gen_set_hflag(DisasContext *s, uint32_t mask) @@ -2558,7 +2561,7 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, TCGv jr) } else { tcg_gen_exit_tb(0); } - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } static inline void @@ -2599,7 +2602,7 @@ static void gen_jmp_tb(DisasContext *s, target_ulong eip, int tb_num) set_cc_op(s, CC_OP_DYNAMIC); if (s->jmp_opt) { gen_goto_tb(s, tb_num, eip); - b->is_jmp = DISAS_TB_JUMP; + b->is_jmp = DJ_JUMP; } else { gen_jmp_im(eip); gen_eob(s); @@ -6963,7 +6966,7 @@ static target_ulong disas_insn(DisasContextBase *db, CPUState *cpu) gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); gen_helper_pause(cpu_env, tcg_const_i32(s->pc - pc_start)); - db->is_jmp = DISAS_TB_JUMP; + db->is_jmp = DJ_JUMP; } break; case 0x9b: /* fwait */ @@ -7208,7 +7211,7 @@ static target_ulong disas_insn(DisasContextBase *db, CPUState *cpu) gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - pc_start)); - db->is_jmp = DISAS_TB_JUMP; + db->is_jmp = DJ_JUMP; } break; case 0x100: @@ -7391,7 +7394,7 @@ static target_ulong disas_insn(DisasContextBase *db, CPUState *cpu) gen_helper_vmrun(cpu_env, tcg_const_i32(s->aflag - 1), tcg_const_i32(s->pc - pc_start)); tcg_gen_exit_tb(0); - db->is_jmp = DISAS_TB_JUMP; + db->is_jmp = DJ_JUMP; break; case 0xd9: /* VMMCALL */ @@ -8567,7 +8570,7 @@ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) /* generate intermediate code */ db->singlestep_enabled = cpu->singlestep_enabled; db->tb = tb; - db->is_jmp = DISAS_NEXT; + db->is_jmp = DJ_NEXT; db->pc_first = tb->pc; db->pc_next = db->pc_first; i386_trblock_init_disas_context(db, cpu);