@@ -1643,8 +1643,22 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env)
}
/* fpu_helper.c */
-void cpu_set_mxcsr(CPUX86State *env, uint32_t val);
-void cpu_set_fpuc(CPUX86State *env, uint16_t val);
+void tcg_update_mxcsr(CPUX86State *env);
+static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+{
+ env->mxcsr = mxcsr;
+ if (tcg_enabled()) {
+ tcg_update_mxcsr(env);
+ }
+}
+
+static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
+{
+ env->fpuc = fpuc;
+ if (tcg_enabled()) {
+ update_fp_status(env);
+ }
+}
/* mem_helper.c */
void helper_lock_init(void);
@@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask)
#define SSE_RC_CHOP 0x6000
#define SSE_FZ 0x8000
-void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+void tcg_update_mxcsr(CPUX86State *env)
{
+ uint32_t mxcsr = env->mxcsr;
int rnd_type;
- env->mxcsr = mxcsr;
-
/* set rounding mode */
switch (mxcsr & SSE_RC_MASK) {
default:
@@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status);
}
-void cpu_set_fpuc(CPUX86State *env, uint16_t val)
-{
- env->fpuc = val;
- update_fp_status(env);
-}
-
void helper_ldmxcsr(CPUX86State *env, uint32_t val)
{
cpu_set_mxcsr(env, val);
Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific tcg code. Signed-off-by: Yang Zhong <yang.zhong@intel.com> --- target/i386/cpu.h | 18 ++++++++++++++++-- target/i386/fpu_helper.c | 11 ++--------- 2 files changed, 18 insertions(+), 11 deletions(-)