From patchwork Fri Jul 14 09:18:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 9840253 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D8600602BD for ; Fri, 14 Jul 2017 09:19:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6C9B2875A for ; Fri, 14 Jul 2017 09:19:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B96492876E; Fri, 14 Jul 2017 09:19:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0340B2875A for ; Fri, 14 Jul 2017 09:19:22 +0000 (UTC) Received: from localhost ([::1]:36426 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVwkr-0007Fp-9A for patchwork-qemu-devel@patchwork.kernel.org; Fri, 14 Jul 2017 05:19:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57267) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVwjw-0007EP-Ua for qemu-devel@nongnu.org; Fri, 14 Jul 2017 05:18:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dVwjt-0004O4-Ny for qemu-devel@nongnu.org; Fri, 14 Jul 2017 05:18:24 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:42126) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVwjt-0004Nh-Bg; Fri, 14 Jul 2017 05:18:21 -0400 Received: from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v6E9IGYe009328; Fri, 14 Jul 2017 11:18:16 +0200 Received: from localhost (unknown [31.210.188.120]) by correu-2.ac.upc.es (Postfix) with ESMTPSA id 204DD114; Fri, 14 Jul 2017 11:18:10 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 12:18:09 +0300 Message-Id: <150002388959.22386.12439646324427589940.stgit@frigg.lan> X-Mailer: git-send-email 2.13.2 In-Reply-To: <150002001195.22386.4679134058536830996.stgit@frigg.lan> References: <150002001195.22386.4679134058536830996.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v6E9IGYe009328 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v13 16/26] target/arm: [tcg] Port to insn_start X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Peter Crosthwaite , "Emilio G. Cota" , "open list:ARM" , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova Reviewed-by: Richard Henderson Reviewed-by: Alex Benneé --- target/arm/translate.c | 36 +++++++++++++++++++++--------------- 1 file changed, 21 insertions(+), 15 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 9adefae7e1..b9183fc511 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -11897,6 +11897,26 @@ static void arm_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu, } } +static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + dc->insn_start_idx = tcg_op_buf_count(); + tcg_gen_insn_start(dc->pc, + (dc->condexec_cond << 4) | (dc->condexec_mask >> 1), + 0); + +#ifdef CONFIG_USER_ONLY + /* Intercept jump to the magic kernel page. */ + if (dc->pc >= 0xffff0000) { + /* We always get here via a jump, so know we are not in a + conditional execution block. */ + gen_exception_internal(EXCP_KERNEL_TRAP); + dc->base.is_jmp = DISAS_EXC; + } +#endif +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) { @@ -11940,21 +11960,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) do { dc->base.num_insns++; - dc->insn_start_idx = tcg_op_buf_count(); - tcg_gen_insn_start(dc->pc, - (dc->condexec_cond << 4) | (dc->condexec_mask >> 1), - 0); - -#ifdef CONFIG_USER_ONLY - /* Intercept jump to the magic kernel page. */ - if (dc->pc >= 0xffff0000) { - /* We always get here via a jump, so know we are not in a - conditional execution block. */ - gen_exception_internal(EXCP_KERNEL_TRAP); - dc->base.is_jmp = DISAS_EXC; - break; - } -#endif + arm_tr_insn_start(&dc->base, cs); if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { CPUBreakpoint *bp;