From patchwork Fri Jul 14 09:46:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 9840401 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 441FE60381 for ; Fri, 14 Jul 2017 09:50:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 359C12874F for ; Fri, 14 Jul 2017 09:50:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A7A428777; Fri, 14 Jul 2017 09:50:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6F66C2874F for ; Fri, 14 Jul 2017 09:50:09 +0000 (UTC) Received: from localhost ([::1]:36578 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVxEe-0005pI-Mn for patchwork-qemu-devel@patchwork.kernel.org; Fri, 14 Jul 2017 05:50:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35230) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVxBG-0003LR-W4 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 05:46:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dVxBD-00032d-Th for qemu-devel@nongnu.org; Fri, 14 Jul 2017 05:46:39 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:35240) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVxBD-00030w-H2; Fri, 14 Jul 2017 05:46:35 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v6E9kWGO010233; Fri, 14 Jul 2017 11:46:32 +0200 Received: from localhost (unknown [31.210.188.120]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id 611013AF; Fri, 14 Jul 2017 11:46:26 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 12:46:25 +0300 Message-Id: <150002558503.22386.1149037590886263349.stgit@frigg.lan> X-Mailer: git-send-email 2.13.2 In-Reply-To: <150002001195.22386.4679134058536830996.stgit@frigg.lan> References: <150002001195.22386.4679134058536830996.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v6E9kWGO010233 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v13 23/26] target/arm: [tcg, a64] Port to tb_stop X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Peter Crosthwaite , "Emilio G. Cota" , "open list:ARM" , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Incrementally paves the way towards using the generic instruction translation loop. Signed-off-by: Lluís Vilanova Reviewed-by: Richard Henderson --- target/arm/translate-a64.c | 123 +++++++++++++++++++++++--------------------- 1 file changed, 65 insertions(+), 58 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 0f0051ac98..caeec69d93 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11317,6 +11317,69 @@ static target_ulong aarch64_tr_translate_insn(DisasContextBase *dcbase, return dc->pc; } +static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc = container_of(dcbase, DisasContext, base); + + if (unlikely(dc->base.singlestep_enabled || dc->ss_active) + && dc->base.is_jmp != DISAS_EXC) { + /* Note that this means single stepping WFI doesn't halt the CPU. + * For conditional branch insns this is harmless unreachable code as + * gen_goto_tb() has already handled emitting the debug exception + * (and thus a tb-jump is not possible when singlestepping). + */ + assert(dc->base.is_jmp != DISAS_TB_JUMP); + if (dc->base.is_jmp != DISAS_JUMP) { + gen_a64_set_pc_im(dc->pc); + } + if (dc->base.singlestep_enabled) { + gen_exception_internal(EXCP_DEBUG); + } else { + gen_step_complete_exception(dc); + } + } else { + switch (dc->base.is_jmp) { + case DISAS_NEXT: + case DISAS_TOO_MANY: + gen_goto_tb(dc, 1, dc->pc); + break; + default: + case DISAS_UPDATE: + gen_a64_set_pc_im(dc->pc); + /* fall through */ + case DISAS_JUMP: + tcg_gen_lookup_and_goto_ptr(cpu_pc); + break; + case DISAS_EXIT: + tcg_gen_exit_tb(0); + break; + case DISAS_TB_JUMP: + case DISAS_EXC: + case DISAS_SWI: + break; + case DISAS_WFE: + gen_a64_set_pc_im(dc->pc); + gen_helper_wfe(cpu_env); + break; + case DISAS_YIELD: + gen_a64_set_pc_im(dc->pc); + gen_helper_yield(cpu_env); + break; + case DISAS_WFI: + /* This is a special case because we don't want to just halt the CPU + * if trying to debug across a WFI. + */ + gen_a64_set_pc_im(dc->pc); + gen_helper_wfi(cpu_env); + /* The helper doesn't necessarily throw an exception, but we + * must go back to the main loop to check for interrupts anyway. + */ + tcg_gen_exit_tb(0); + break; + } + } +} + void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs, TranslationBlock *tb) { @@ -11385,68 +11448,12 @@ void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs, */ } while (!dc->base.is_jmp); + aarch64_tr_tb_stop(&dc->base, cs); + if (dc->base.tb->cflags & CF_LAST_IO) { gen_io_end(); } - if (unlikely(cs->singlestep_enabled || dc->ss_active) - && dc->base.is_jmp != DISAS_EXC) { - /* Note that this means single stepping WFI doesn't halt the CPU. - * For conditional branch insns this is harmless unreachable code as - * gen_goto_tb() has already handled emitting the debug exception - * (and thus a tb-jump is not possible when singlestepping). - */ - assert(dc->base.is_jmp != DISAS_TB_JUMP); - if (dc->base.is_jmp != DISAS_JUMP) { - gen_a64_set_pc_im(dc->pc); - } - if (cs->singlestep_enabled) { - gen_exception_internal(EXCP_DEBUG); - } else { - gen_step_complete_exception(dc); - } - } else { - switch (dc->base.is_jmp) { - case DISAS_NEXT: - case DISAS_TOO_MANY: - gen_goto_tb(dc, 1, dc->pc); - break; - default: - case DISAS_UPDATE: - gen_a64_set_pc_im(dc->pc); - /* fall through */ - case DISAS_JUMP: - tcg_gen_lookup_and_goto_ptr(cpu_pc); - break; - case DISAS_EXIT: - tcg_gen_exit_tb(0); - break; - case DISAS_TB_JUMP: - case DISAS_EXC: - case DISAS_SWI: - break; - case DISAS_WFE: - gen_a64_set_pc_im(dc->pc); - gen_helper_wfe(cpu_env); - break; - case DISAS_YIELD: - gen_a64_set_pc_im(dc->pc); - gen_helper_yield(cpu_env); - break; - case DISAS_WFI: - /* This is a special case because we don't want to just halt the CPU - * if trying to debug across a WFI. - */ - gen_a64_set_pc_im(dc->pc); - gen_helper_wfi(cpu_env); - /* The helper doesn't necessarily throw an exception, but we - * must go back to the main loop to check for interrupts anyway. - */ - tcg_gen_exit_tb(0); - break; - } - } - gen_tb_end(tb, dc->base.num_insns); #ifdef DEBUG_DISAS