From patchwork Thu Jul 27 10:59:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 9866581 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CF7E86038F for ; Thu, 27 Jul 2017 11:01:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2C9228745 for ; Thu, 27 Jul 2017 11:01:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A17EB287CF; Thu, 27 Jul 2017 11:01:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1654A28814 for ; Thu, 27 Jul 2017 11:01:35 +0000 (UTC) Received: from localhost ([::1]:42244 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dagX7-0006ci-5c for patchwork-qemu-devel@patchwork.kernel.org; Thu, 27 Jul 2017 07:00:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40050) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dagVm-0006Hi-Jg for qemu-devel@nongnu.org; Thu, 27 Jul 2017 06:59:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dagVl-0000I4-U9 for qemu-devel@nongnu.org; Thu, 27 Jul 2017 06:59:22 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:37719) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dagVj-0008P0-OF; Thu, 27 Jul 2017 06:59:19 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dagVd-0003ml-Pd; Thu, 27 Jul 2017 11:59:13 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 27 Jul 2017 11:59:10 +0100 Message-Id: <1501153150-19984-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501153150-19984-1-git-send-email-peter.maydell@linaro.org> References: <1501153150-19984-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH for-2.10 5/5] target/arm: Migrate MPU_RNR register state for M profile cores X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The PMSAv7 region number register is migrated for R profile cores using the cpreg scheme, but M profile doesn't use cpregs, and so we weren't migrating the MPU_RNR register state at all. Fix that by adding a migration subsection for the M profile case. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- target/arm/machine.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/target/arm/machine.c b/target/arm/machine.c index 93c1a78..1f66da4 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -171,6 +171,29 @@ static const VMStateDescription vmstate_pmsav7 = { } }; +static bool pmsav7_rnr_needed(void *opaque) +{ + ARMCPU *cpu = opaque; + CPUARMState *env = &cpu->env; + + /* For R profile cores pmsav7.rnr is migrated via the cpreg + * "RGNR" definition in helper.h. For M profile we have to + * migrate it separately. + */ + return arm_feature(env, ARM_FEATURE_M); +} + +static const VMStateDescription vmstate_pmsav7_rnr = { + .name = "cpu/pmsav7-rnr", + .version_id = 1, + .minimum_version_id = 1, + .needed = pmsav7_rnr_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT32(env.pmsav7.rnr, ARMCPU), + VMSTATE_END_OF_LIST() + } +}; + static int get_cpsr(QEMUFile *f, void *opaque, size_t size, VMStateField *field) { @@ -377,6 +400,11 @@ const VMStateDescription vmstate_arm_cpu = { &vmstate_iwmmxt, &vmstate_m, &vmstate_thumb2ee, + /* pmsav7_rnr must come before pmsav7 so that we have the + * region number before we test it in the VMSTATE_VALIDATE + * in vmstate_pmsav7. + */ + &vmstate_pmsav7_rnr, &vmstate_pmsav7, NULL }