From patchwork Fri Aug 11 02:11:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9895219 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6E4FA600CB for ; Fri, 11 Aug 2017 08:19:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5548D28AE1 for ; Fri, 11 Aug 2017 08:19:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4989528BFD; Fri, 11 Aug 2017 08:19:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BDFEC28AE1 for ; Fri, 11 Aug 2017 08:19:00 +0000 (UTC) Received: from localhost ([::1]:47428 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dg59P-0001fh-LF for patchwork-qemu-devel@patchwork.kernel.org; Fri, 11 Aug 2017 04:18:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45743) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dg58g-0001ej-Gn for qemu-devel@nongnu.org; Fri, 11 Aug 2017 04:17:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dg58b-0001Ee-Da for qemu-devel@nongnu.org; Fri, 11 Aug 2017 04:17:50 -0400 Received: from mga05.intel.com ([192.55.52.43]:18607) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dg58b-0001B4-2U for qemu-devel@nongnu.org; Fri, 11 Aug 2017 04:17:45 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP; 11 Aug 2017 01:17:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.41,356,1498546800"; d="scan'208"; a="1002520066" Received: from sky-ws.sh.intel.com (HELO localhost) ([10.239.48.141]) by orsmga003.jf.intel.com with ESMTP; 11 Aug 2017 01:17:40 -0700 From: Lan Tianyu To: qemu-devel@nongnu.org Date: Thu, 10 Aug 2017 22:11:12 -0400 Message-Id: <1502417472-15511-1-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.8.3.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.43 Subject: [Qemu-devel] [PATCH v2] x86: Increase max vcpu number to 8192 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , ehabkost@redhat.com, mst@redhat.com, rkrcmar@redhat.com, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Intel Xeon phi chip will support 352 logical threads. For HPC usage case, it will create a huge VM with vcpus number as same as host cpus. This patch is to increase max vcpu number from 288 to 8192 which is current default maximum cpu number for Linux kernel. Signed-off-by: Lan Tianyu --- Change since v1: * Bump max vcpu number from 352 to 8192 * Add compat support for new max vcpu limitation hw/i386/pc_q35.c | 15 ++++++++++++--- include/hw/i386/pc.h | 2 ++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 169a214..06fdc95 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -299,14 +299,23 @@ static void pc_q35_machine_options(MachineClass *m) m->default_display = "std"; m->no_floppy = 1; m->has_dynamic_sysbus = true; - m->max_cpus = 288; + m->max_cpus = 8192; } +static void pc_q35_2_11_machine_options(MachineClass *m) +{ + pc_q35_machine_options(m); + m->alias = "q35"; +} +DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL, + pc_q35_2_11_machine_options); + static void pc_q35_2_10_machine_options(MachineClass *m) { - pc_q35_machine_options(m); - m->alias = "q35"; + pc_q35_2_11_machine_options(m); + m->max_cpus = 288; m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); } DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL, diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d80859b..634abc6 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -369,6 +369,8 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); +#define PC_COMPAT_2_10 \ + HW_COMPAT_2_10 \ #define PC_COMPAT_2_9 \ HW_COMPAT_2_9 \ {\