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Fri, 18 Aug 2017 10:09:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 7810A37E88 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id F212966D62 for ; Fri, 18 Aug 2017 10:09:23 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 18 Aug 2017 12:08:54 +0200 Message-Id: <1503050939-227939-23-git-send-email-imammedo@redhat.com> In-Reply-To: <1503050939-227939-1-git-send-email-imammedo@redhat.com> References: <1503050939-227939-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Fri, 18 Aug 2017 10:09:24 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-2.11 22/27] lm32: replace cpu_lm32_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Acked-by: Michael Walle Reviewed-by: Eduardo Habkost --- target/lm32/cpu.h | 3 +-- hw/lm32/lm32_boards.c | 4 ++-- hw/lm32/milkymist.c | 2 +- target/lm32/helper.c | 5 ----- 4 files changed, 4 insertions(+), 10 deletions(-) diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 1d972cb..de265b5 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -238,7 +238,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx) return (dc >> (idx+1)*2) & 0x3; } -LM32CPU *cpu_lm32_init(const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -256,7 +255,7 @@ void lm32_watchpoint_insert(CPULM32State *env, int index, target_ulong address, void lm32_watchpoint_remove(CPULM32State *env, int index); bool lm32_cpu_do_semihosting(CPUState *cs); -#define cpu_init(cpu_model) CPU(cpu_lm32_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model) #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index 8f0c307..eccf0ac 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -104,7 +104,7 @@ static void lm32_evr_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "lm32-full"; } - cpu = cpu_lm32_init(cpu_model); + cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); @@ -205,7 +205,7 @@ static void lm32_uclinux_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "lm32-full"; } - cpu = cpu_lm32_init(cpu_model); + cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index 5cae0f1..dffd879 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -111,7 +111,7 @@ milkymist_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "lm32-full"; } - cpu = cpu_lm32_init(cpu_model); + cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); diff --git a/target/lm32/helper.c b/target/lm32/helper.c index 891da18..929cc36 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -219,11 +219,6 @@ bool lm32_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } -LM32CPU *cpu_lm32_init(const char *cpu_model) -{ - return LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); -} - /* Some soc ignores the MSB on the address bus. Thus creating a shadow memory * area. As a general rule, 0x00000000-0x7fffffff is cached, whereas * 0x80000000-0xffffffff is not cached and used to access IO devices. */