From patchwork Tue Sep 5 09:30:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gonglei (Arei)" X-Patchwork-Id: 9938317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 330A7600CB for ; Tue, 5 Sep 2017 09:38:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 24C1628903 for ; Tue, 5 Sep 2017 09:38:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 186BC28906; Tue, 5 Sep 2017 09:38:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0FC7828903 for ; Tue, 5 Sep 2017 09:38:05 +0000 (UTC) Received: from localhost ([::1]:57733 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpAJ2-0005BN-9C for patchwork-qemu-devel@patchwork.kernel.org; Tue, 05 Sep 2017 05:38:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46358) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpABp-0008T5-OV for qemu-devel@nongnu.org; Tue, 05 Sep 2017 05:30:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dpABk-0007uz-OY for qemu-devel@nongnu.org; Tue, 05 Sep 2017 05:30:37 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:2251) by eggs.gnu.org with esmtps (TLS1.0:RSA_ARCFOUR_SHA1:16) (Exim 4.71) (envelope-from ) id 1dpABk-0007sz-4r for qemu-devel@nongnu.org; Tue, 05 Sep 2017 05:30:32 -0400 Received: from 172.30.72.60 (EHLO DGGEMS414-HUB.china.huawei.com) ([172.30.72.60]) by dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DGQ09083; Tue, 05 Sep 2017 17:30:24 +0800 (CST) Received: from localhost (10.177.18.62) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.301.0; Tue, 5 Sep 2017 17:30:13 +0800 From: Gonglei To: Date: Tue, 5 Sep 2017 17:30:04 +0800 Message-ID: <1504603805-180240-2-git-send-email-arei.gonglei@huawei.com> X-Mailer: git-send-email 2.8.2.windows.1 In-Reply-To: <1504603805-180240-1-git-send-email-arei.gonglei@huawei.com> References: <1504603805-180240-1-git-send-email-arei.gonglei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.18.62] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A0B0204.59AE6EB0.01F6, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 957929774d3f9df61be49d3b077bc4f5 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] [fuzzy] X-Received-From: 45.249.212.191 Subject: [Qemu-devel] [PATCH 1/2] pc: add 2.11 machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: weidong.huang@huawei.com, ehabkost@redhat.com, mst@redhat.com, mtosatti@redhat.com, Gonglei , vrozenfe@redhat.com, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP CC: "Michael S. Tsirkin" CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost Signed-off-by: Gonglei Reviewed-by: Eduardo Habkost --- hw/i386/pc_piix.c | 15 ++++++++++++--- hw/i386/pc_q35.c | 13 +++++++++++-- include/hw/i386/pc.h | 3 +++ 3 files changed, 26 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 46dfd2c..b03cc04 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -436,21 +436,30 @@ static void pc_i440fx_machine_options(MachineClass *m) m->default_display = "std"; } -static void pc_i440fx_2_10_machine_options(MachineClass *m) +static void pc_i440fx_2_11_machine_options(MachineClass *m) { pc_i440fx_machine_options(m); m->alias = "pc"; m->is_default = 1; } +DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, + pc_i440fx_2_11_machine_options); + +static void pc_i440fx_2_10_machine_options(MachineClass *m) +{ + pc_i440fx_2_11_machine_options(m); + m->is_default = 0; + m->alias = NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); +} + DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, pc_i440fx_2_10_machine_options); static void pc_i440fx_2_9_machine_options(MachineClass *m) { pc_i440fx_2_10_machine_options(m); - m->is_default = 0; - m->alias = NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 169a214..d6fef8d 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -302,20 +302,29 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus = 288; } -static void pc_q35_2_10_machine_options(MachineClass *m) +static void pc_q35_2_11_machine_options(MachineClass *m) { pc_q35_machine_options(m); m->alias = "q35"; m->numa_auto_assign_ram = numa_legacy_auto_assign_ram; } +DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL, + pc_q35_2_11_machine_options); + +static void pc_q35_2_10_machine_options(MachineClass *m) +{ + pc_q35_2_11_machine_options(m); + m->alias = NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); +} + DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL, pc_q35_2_10_machine_options); static void pc_q35_2_9_machine_options(MachineClass *m) { pc_q35_2_10_machine_options(m); - m->alias = NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); } diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d80859b..8226904 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -369,6 +369,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); +#define PC_COMPAT_2_10 \ + HW_COMPAT_2_10 \ + #define PC_COMPAT_2_9 \ HW_COMPAT_2_9 \ {\