From patchwork Wed Sep 6 18:07:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 9941165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0D71C60216 for ; Wed, 6 Sep 2017 18:08:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F085628470 for ; Wed, 6 Sep 2017 18:08:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E506028B82; Wed, 6 Sep 2017 18:08:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 60C8728470 for ; Wed, 6 Sep 2017 18:08:47 +0000 (UTC) Received: from localhost ([::1]:37371 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpeko-00078x-Ed for patchwork-qemu-devel@patchwork.kernel.org; Wed, 06 Sep 2017 14:08:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46714) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpejT-0006gd-OV for qemu-devel@nongnu.org; Wed, 06 Sep 2017 14:07:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dpejP-0008Sg-Fb for qemu-devel@nongnu.org; Wed, 06 Sep 2017 14:07:23 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:56132) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpejP-0008PE-4n for qemu-devel@nongnu.org; Wed, 06 Sep 2017 14:07:19 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v86I7Dur004766; Wed, 6 Sep 2017 20:07:13 +0200 Received: from localhost (unknown [31.210.187.58]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id 2F70A8AF; Wed, 6 Sep 2017 20:07:08 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Wed, 6 Sep 2017 21:07:06 +0300 Message-Id: <150472122675.24907.11597641982841030964.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150471856141.24907.274176769201097378.stgit@frigg.lan> References: <150471856141.24907.274176769201097378.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v86I7Dur004766 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v4 11/20] instrument: Track vCPUs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Emilio G. Cota" , =?UTF-8?q?Llu=C3=ADs=20Vilanova?= , Stefan Hajnoczi Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Keep a translation between instrumentation's QICPU and CPUState objects to avoid exposing QEMU's internals to instrumentation clients. Signed-off-by: Lluís Vilanova --- cpus-common.c | 9 +++++++++ instrument/control.c | 22 ++++++++++++++++++++++ instrument/control.h | 32 ++++++++++++++++++++++++++++++++ instrument/control.inc.h | 23 +++++++++++++++++++++++ 4 files changed, 86 insertions(+) diff --git a/cpus-common.c b/cpus-common.c index 59f751ecf9..ec5f46cc3d 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -22,6 +22,9 @@ #include "exec/cpu-common.h" #include "qom/cpu.h" #include "sysemu/cpus.h" +#if defined(CONFIG_INSTRUMENT) +#include "instrument/control.h" +#endif static QemuMutex qemu_cpu_list_lock; static QemuCond exclusive_cond; @@ -84,6 +87,9 @@ void cpu_list_add(CPUState *cpu) } else { assert(!cpu_index_auto_assigned); } +#if defined(CONFIG_INSTRUMENT) + instr_cpu_add(cpu); +#endif QTAILQ_INSERT_TAIL(&cpus, cpu, node); qemu_mutex_unlock(&qemu_cpu_list_lock); @@ -102,6 +108,9 @@ void cpu_list_remove(CPUState *cpu) assert(!(cpu_index_auto_assigned && cpu != QTAILQ_LAST(&cpus, CPUTailQ))); QTAILQ_REMOVE(&cpus, cpu, node); +#if defined(CONFIG_INSTRUMENT) + instr_cpu_remove(cpu); +#endif cpu->cpu_index = UNASSIGNED_CPU_INDEX; qemu_mutex_unlock(&qemu_cpu_list_lock); } diff --git a/instrument/control.c b/instrument/control.c index 2c2781beeb..83453ea561 100644 --- a/instrument/control.c +++ b/instrument/control.c @@ -13,10 +13,32 @@ #include "instrument/load.h" #include "instrument/qemu-instr/control.h" #include "instrument/qemu-instr/visibility.h" +#include "qom/cpu.h" + __thread InstrState instr_cur_state; +unsigned int instr_cpus_count; +CPUState **instr_cpus; + +void instr_cpu_add(CPUState *vcpu) +{ + unsigned int idx = vcpu->cpu_index; + if (idx >= instr_cpus_count) { + instr_cpus_count = idx + 1; + instr_cpus = realloc(instr_cpus, sizeof(*instr_cpus) * instr_cpus_count); + } + instr_cpus[idx] = vcpu; +} + +void instr_cpu_remove(CPUState *vcpu) +{ + unsigned int idx = vcpu->cpu_index; + instr_cpus[idx] = NULL; +} + + qi_fini_fn instr_event__fini_fn; void *instr_event__fini_data; diff --git a/instrument/control.h b/instrument/control.h index f2b085f69b..0c37692465 100644 --- a/instrument/control.h +++ b/instrument/control.h @@ -10,6 +10,38 @@ #ifndef INSTRUMENT__CONTROL_H #define INSTRUMENT__CONTROL_H +#include "qemu/typedefs.h" +#include "instrument/qemu-instr/types.h" + + +/** + * instr_cpu_add: + * + * Make @vcpu available to instrumentation clients. + */ +void instr_cpu_add(CPUState *vcpu); + +/** + * instr_cpu_remove: + * + * Make @vcpu unavailable to instrumentation clients. + */ +void instr_cpu_remove(CPUState *vcpu); + +/** + * instr_cpu_get: + * + * Get the #CPUState corresponding to the given #QICPU. + */ +static inline CPUState *instr_cpu_get(QICPU vcpu); + +/** + * instr_cpu_set: + * + * Get the #QICPU corresponding to the given #CPUState. + */ +static inline QICPU instr_cpu_set(CPUState *vcpu); + /** * InstrState: diff --git a/instrument/control.inc.h b/instrument/control.inc.h index 0f649f4caa..18ae6a34cc 100644 --- a/instrument/control.inc.h +++ b/instrument/control.inc.h @@ -7,9 +7,12 @@ * See the COPYING file in the top-level directory. */ +#include "qemu/osdep.h" #include "qemu/atomic.h" #include "qemu/compiler.h" +#include "qom/cpu.h" #include +#include extern __thread InstrState instr_cur_state; @@ -23,3 +26,23 @@ static inline InstrState instr_get_state(void) { return atomic_load_acquire(&instr_cur_state); } + + +extern unsigned int instr_cpus_count; +extern CPUState **instr_cpus; + +static inline CPUState *instr_cpu_get(QICPU vcpu) +{ + unsigned int idx = (uintptr_t)vcpu; + if (idx >= instr_cpus_count) { + return NULL; + } else { + return instr_cpus[idx]; + } +} + +static inline QICPU instr_cpu_set(CPUState *vcpu) +{ + uintptr_t idx = vcpu->cpu_index; + return (QICPU )idx; +}