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[v2,05/16] target/xtensa: update import_core.sh script for libisa

Message ID 1513661932-6849-6-git-send-email-jcmvbkbc@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Max Filippov Dec. 19, 2017, 5:38 a.m. UTC
Extract xtensa-modules.c from the overlay, fix up known issues, include
it into the core-$NAME.c.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
Changes v1->v2:
- add sed transformation to target/xtensa/import-core.sh that drops
  #include "ansidecl.h" from imported xtensa-modules.c;

 target/xtensa/import_core.sh | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
diff mbox

Patch

diff --git a/target/xtensa/import_core.sh b/target/xtensa/import_core.sh
index cebb6e9c4c61..32255eea9b1b 100755
--- a/target/xtensa/import_core.sh
+++ b/target/xtensa/import_core.sh
@@ -23,6 +23,17 @@  tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \
     --xform='s/core/core-isa/' config/core.h
 tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
     sed -n '1,/*\//p;/XTREG/,/XTREG_END/p' > "$TARGET"/gdb-config.c
+#
+# Fix up known issues in the xtensa-modules.c
+#
+tar -xf "$OVERLAY" -O binutils/xtensa-modules.c | \
+    sed -e 's/\(xtensa_opcode_encode_fn.*\[\] =\)/static \1/' \
+        -e '/^int num_bypass_groups()/,/}/d' \
+        -e '/^int num_bypass_group_chunks()/,/}/d' \
+        -e '/^uint32 \*bypass_entry(int i)/,/}/d' \
+        -e '/^#include "ansidecl.h"/d' \
+        -e '/^Slot_[a-zA-Z0-9_]\+_decode (const xtensa_insnbuf insn)/,/^}/s/^  return 0;$/  return XTENSA_UNDEFINED;/' \
+    > "$TARGET"/xtensa-modules.c
 
 cat <<EOF > "${TARGET}.c"
 #include "qemu/osdep.h"
@@ -35,6 +46,9 @@  cat <<EOF > "${TARGET}.c"
 #include "core-$NAME/core-isa.h"
 #include "overlay_tool.h"
 
+#define xtensa_modules xtensa_modules_$NAME
+#include "core-$NAME/xtensa-modules.c"
+
 static XtensaConfig $NAME __attribute__((unused)) = {
     .name = "$NAME",
     .gdb_regmap = {
@@ -42,6 +56,7 @@  static XtensaConfig $NAME __attribute__((unused)) = {
 #include "core-$NAME/gdb-config.c"
         }
     },
+    .isa_internal = &xtensa_modules,
     .clock_freq_khz = $FREQ,
     DEFAULT_SECTIONS
 };