From patchwork Thu Dec 21 14:31:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Michael S. Tsirkin" X-Patchwork-Id: 10127805 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B6B8860390 for ; Thu, 21 Dec 2017 15:08:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A8C6D29D2F for ; Thu, 21 Dec 2017 15:08:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9D68829D3E; Thu, 21 Dec 2017 15:08:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CEEAE29D2F for ; Thu, 21 Dec 2017 15:08:27 +0000 (UTC) Received: from localhost ([::1]:53924 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eS2SR-0008Pj-1f for patchwork-qemu-devel@patchwork.kernel.org; Thu, 21 Dec 2017 10:08:27 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47658) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eS1sZ-0001Fn-Jz for qemu-devel@nongnu.org; Thu, 21 Dec 2017 09:31:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eS1sY-0007Sq-Gn for qemu-devel@nongnu.org; Thu, 21 Dec 2017 09:31:23 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37448) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eS1sY-0007SR-9z for qemu-devel@nongnu.org; Thu, 21 Dec 2017 09:31:22 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 760273A273; Thu, 21 Dec 2017 14:31:21 +0000 (UTC) Received: from redhat.com (ovpn-124-215.rdu2.redhat.com [10.10.124.215]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5ADE7503B9; Thu, 21 Dec 2017 14:31:19 +0000 (UTC) Date: Thu, 21 Dec 2017 16:31:18 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1513866427-27125-26-git-send-email-mst@redhat.com> References: <1513866427-27125-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1513866427-27125-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 21 Dec 2017 14:31:21 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 25/25] smbus: do not immediately complete commands X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?B?SGVydsOp?= Poussineau , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Paolo Bonzini Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Hervé Poussineau PIIX4 errata says that "immediate polling of the Host Status Register BUSY bit may indicate that the SMBus is NOT busy." Due to this, some code does the following steps: (a) set parameters (b) start command (c) check for smbus busy bit set (to know that command started) (d) check for smbus busy bit not set (to know that command finished) Let (c) happen, by immediately setting the busy bit, and really executing the command when status register has been read once. This fixes a problem with AMIBIOS, which can now properly initialize the PIIX4. Signed-off-by: Hervé Poussineau Signed-off-by: Philippe Mathieu-Daudé --- hw/i2c/pm_smbus.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c index 6fc3923..ec060d5 100644 --- a/hw/i2c/pm_smbus.c +++ b/hw/i2c/pm_smbus.c @@ -63,6 +63,9 @@ static void smb_transaction(PMSMBus *s) I2CBus *bus = s->smbus; int ret; + assert(s->smb_stat & STS_HOST_BUSY); + s->smb_stat &= ~STS_HOST_BUSY; + SMBUS_DPRINTF("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot); /* Transaction isn't exec if STS_DEV_ERR bit set */ if ((s->smb_stat & STS_DEV_ERR) != 0) { @@ -135,6 +138,13 @@ error: } +static void smb_transaction_start(PMSMBus *s) +{ + /* Do not execute immediately the command ; it will be + * executed when guest will read SMB_STAT register */ + s->smb_stat |= STS_HOST_BUSY; +} + static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val, unsigned width) { @@ -150,7 +160,7 @@ static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val, case SMBHSTCNT: s->smb_ctl = val; if (val & 0x40) - smb_transaction(s); + smb_transaction_start(s); break; case SMBHSTCMD: s->smb_cmd = val; @@ -182,6 +192,10 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width) switch(addr) { case SMBHSTSTS: val = s->smb_stat; + if (s->smb_stat & STS_HOST_BUSY) { + /* execute command now */ + smb_transaction(s); + } break; case SMBHSTCNT: s->smb_index = 0;