From patchwork Thu Jan 11 02:21:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Clark X-Patchwork-Id: 10156729 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 04584602B3 for ; Thu, 11 Jan 2018 02:34:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E4E5E28680 for ; Thu, 11 Jan 2018 02:34:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D9B0228684; Thu, 11 Jan 2018 02:34:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 581D828680 for ; Thu, 11 Jan 2018 02:34:06 +0000 (UTC) Received: from localhost ([::1]:59962 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZSgv-0003jn-Ec for patchwork-qemu-devel@patchwork.kernel.org; Wed, 10 Jan 2018 21:34:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47999) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZSWd-00039t-Q0 for qemu-devel@nongnu.org; Wed, 10 Jan 2018 21:23:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZSWc-0008GZ-NQ for qemu-devel@nongnu.org; Wed, 10 Jan 2018 21:23:27 -0500 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:40829) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eZSWc-0008Fw-I1 for qemu-devel@nongnu.org; Wed, 10 Jan 2018 21:23:26 -0500 Received: by mail-pf0-x242.google.com with SMTP id i66so16313pfd.7 for ; Wed, 10 Jan 2018 18:23:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=G2B/fJpOIfTTZtlhN0nNHaY9luzIQArUvbjqozDDCF4=; b=Uct/6eAVgb0RvVIZpxovvZxGmlBRAxuTIAxXYwFnSfhanzbplvlN4Y8o2+2vjGrDTH /qhsdgcN64V/Q0Ao2mAdMUJOYPvMkWzXxP9gkrXECSbQh1/AFKMHzOuGvdxt6n7aNc8b JXRc0eDNzoh8KdVOGgPTl8GR2Etwy9Je3NyOXu9VsdLPNl5PRUM2f5TWOBkhgtKrOGqW 1r+CEyIbtVA1kdHeeg+BdXCZ3BVnh9j+7wQTOvL1DnlK9Xfg0rD0Rd+Lgt2saphR/eGM imis718c897zEkgIw2NFgOS+DdsR9+AtJO8fTw8HAlrF0HDwhmx8DZTASiVo5caLeeQV Y6Ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=G2B/fJpOIfTTZtlhN0nNHaY9luzIQArUvbjqozDDCF4=; b=JQu6jStFTwjfsmW2Vf4ZlMGLPZsBr+4QKAV98gRxPNEsn7Pm4L2yVqE/kMG80AYBph H0gaq+cVcR2cJ3R94uNiPj3i2X1e+acx0lKwgF8PfEQ/DIhfeaCOGh1XnVJmSk0ygyjj bwJuBHFD9ns/0tpQJ4ZaAo086VT9oFjTN+Rc6UPKo58CuJFRd2aDuFd2dhmZNQHIptfW t96pjXhYufinQbnVo6mJPkJUk24MhLaLO/jHq1owrbo5eyiioMzonsPkk5ZhRqZVIkU1 Im51h66cWc/9sY1BoM41goETrrEGDcNZk8EP3Knj6SdPEVHeVxz3JBPUAqpIb6jm6ESD FmRw== X-Gm-Message-State: AKGB3mLMgsG6lzoysjoN+2S6y1WPaL72ghefoHoOf9ZASITFhoTtF9Wy qVvsHBMnVXSFl+FEJN6BKzT0jLIkffw= X-Google-Smtp-Source: ACJfBosXc3lK8q7iIa56JFl1DavYZ0iVlrdb1LVbBUKWes52JO5sEqBDnakQnCn/HudONtODuiGMwA== X-Received: by 10.84.150.130 with SMTP id h2mr20605080plh.116.1515637405215; Wed, 10 Jan 2018 18:23:25 -0800 (PST) Received: from monty.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id e12sm33545939pgu.81.2018.01.10.18.23.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 10 Jan 2018 18:23:24 -0800 (PST) From: Michael Clark To: qemu-devel@nongnu.org Date: Wed, 10 Jan 2018 18:21:50 -0800 Message-Id: <1515637324-96034-8-git-send-email-mjc@sifive.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1515637324-96034-1-git-send-email-mjc@sifive.com> References: <1515637324-96034-1-git-send-email-mjc@sifive.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v3 07/21] RISC-V GDB Stub X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , Michael Clark , Palmer Dabbelt , Sagar Karandikar , RISC-V Patches Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP GDB Register read and write routines. Signed-off-by: Michael Clark Reviewed-by: Richard Henderson --- target/riscv/gdbstub.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 target/riscv/gdbstub.c diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c new file mode 100644 index 0000000..12d1d9f --- /dev/null +++ b/target/riscv/gdbstub.c @@ -0,0 +1,59 @@ +/* + * RISC-V GDB Server Stub + * + * Author: Sagar Karandikar, sagark@eecs.berkeley.edu + * + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" +#include "cpu.h" + +int riscv_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) +{ + /* TODO proper x0 handling */ + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + + if (n < 32) { + return gdb_get_regl(mem_buf, env->gpr[n]); + } else if (n == 32) { + return gdb_get_regl(mem_buf, env->pc); + } else if (n < 65) { + return gdb_get_reg64(mem_buf, env->fpr[n - 33]); + } + return 0; +} + +int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) +{ + /* TODO proper x0 handling */ + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + + if (n < 32) { + env->gpr[n] = ldtul_p(mem_buf); + return sizeof(target_ulong); + } else if (n == 32) { + env->pc = ldtul_p(mem_buf); + return sizeof(target_ulong); + } else if (n < 65) { + env->fpr[n - 33] = ldq_p(mem_buf); /* always 64-bit */ + return sizeof(uint64_t); + } + return 0; +}