From patchwork Wed Feb 14 11:20:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 10218473 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C08156055C for ; Wed, 14 Feb 2018 11:32:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2A8628801 for ; Wed, 14 Feb 2018 11:32:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 978142880D; Wed, 14 Feb 2018 11:32:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1588328801 for ; Wed, 14 Feb 2018 11:32:45 +0000 (UTC) Received: from localhost ([::1]:37589 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1elvIq-0000bS-A7 for patchwork-qemu-devel@patchwork.kernel.org; Wed, 14 Feb 2018 06:32:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43608) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1elv7W-0006Ve-BG for qemu-devel@nongnu.org; Wed, 14 Feb 2018 06:21:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1elv7V-0007FC-2Y for qemu-devel@nongnu.org; Wed, 14 Feb 2018 06:21:02 -0500 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:41994 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1elv7U-0007F4-Sc for qemu-devel@nongnu.org; Wed, 14 Feb 2018 06:21:00 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 839B68182D2F; Wed, 14 Feb 2018 11:21:00 +0000 (UTC) Received: from thh440s.redhat.com (ovpn-116-136.ams2.redhat.com [10.36.116.136]) by smtp.corp.redhat.com (Postfix) with ESMTP id C2C672024CA4; Wed, 14 Feb 2018 11:20:59 +0000 (UTC) From: Thomas Huth To: Peter Maydell , qemu-devel@nongnu.org Date: Wed, 14 Feb 2018 12:20:31 +0100 Message-Id: <1518607234-17739-16-git-send-email-thuth@redhat.com> In-Reply-To: <1518607234-17739-1-git-send-email-thuth@redhat.com> References: <1518607234-17739-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Wed, 14 Feb 2018 11:21:00 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Wed, 14 Feb 2018 11:21:00 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'thuth@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PULL 15/18] tests/m48t59: Fix and re-enable the test for sparc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The m48t59 test has been disabled in commit baeddded5fe6fa37d13fb94bf8d ("sparc: disable qtest in make check"), likely due to some timing issues in the bcd_check_time tests which might fail if it gets interrupted for too long. It should be OK to re-enable this test if we make sure that we do not run it on timing-sensitive machines, thus it should be OK if we only run it in the g_test_slow() mode. Additionally, there are two other issues: First, the test can not run so easily on sparc64 anymore, since commit f3b18f35a23c60edbda6420cd ("sun4u: switch m48t59 NVRAM to MMIO access") moved the m48t59 device to the ebus instead, and for this you first have to set up the corresponding PCI device (which is currently not possible from within the m48t59 test). So we can only re-enable this test on sparc, but not the sparc64 target. Second, the fuzzing test is executed before the bcd-check-time test (due to the naming of the tests), without having the base address set up properly, so the fuzzing test does not really check anything at all. Fix it by setting up the base address from the main function already and by moving the qtest_start() to the tests themselves, so that each test starts with a clean environment (since after the fuzzing, the clock is unusable for the bcd-check-time test). Signed-off-by: Thomas Huth --- tests/Makefile.include | 6 ++---- tests/m48t59-test.c | 58 ++++++++++++++++++++++++++++---------------------- 2 files changed, 34 insertions(+), 30 deletions(-) diff --git a/tests/Makefile.include b/tests/Makefile.include index 566d30a..c27a9a5 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -351,13 +351,11 @@ check-qtest-sh4-y = tests/endianness-test$(EXESUF) check-qtest-sh4eb-y = tests/endianness-test$(EXESUF) check-qtest-sparc-y = tests/prom-env-test$(EXESUF) -#check-qtest-sparc-y += tests/m48t59-test$(EXESUF) -#gcov-files-sparc-y = hw/timer/m48t59.c +check-qtest-sparc-y += tests/m48t59-test$(EXESUF) +gcov-files-sparc-y = hw/timer/m48t59.c check-qtest-sparc-y += tests/boot-serial-test$(EXESUF) check-qtest-sparc64-y = tests/endianness-test$(EXESUF) -#check-qtest-sparc64-y += tests/m48t59-test$(EXESUF) -#gcov-files-sparc64-y += hw/timer/m48t59.c check-qtest-sparc64-y += tests/prom-env-test$(EXESUF) check-qtest-sparc64-y += tests/boot-serial-test$(EXESUF) diff --git a/tests/m48t59-test.c b/tests/m48t59-test.c index 0f921ef..a85f84d 100644 --- a/tests/m48t59-test.c +++ b/tests/m48t59-test.c @@ -143,11 +143,18 @@ static void cmos_get_date_time(struct tm *date) ts = mktime(date); } -static void check_time(int wiggle) +static QTestState *m48t59_qtest_start(void) +{ + return qtest_start("-rtc clock=vm"); +} + +static void bcd_check_time(void) { struct tm start, date[4], end; struct tm *datep; time_t ts; + const int wiggle = 2; + QTestState *s = m48t59_qtest_start(); /* * This check assumes a few things. First, we cannot guarantee that we get @@ -198,30 +205,15 @@ static void check_time(int wiggle) g_assert_cmpint(ABS(t - s), <=, wiggle); } -} - -static int wiggle = 2; -static void bcd_check_time(void) -{ - if (strcmp(qtest_get_arch(), "sparc64") == 0) { - base = 0x74; - base_year = 1900; - use_mmio = false; - } else if (strcmp(qtest_get_arch(), "sparc") == 0) { - base = 0x71200000; - base_year = 1968; - use_mmio = true; - } else { /* PPC: need to map macio in PCI */ - g_assert_not_reached(); - } - check_time(wiggle); + qtest_quit(s); } /* success if no crash or abort */ static void fuzz_registers(void) { unsigned int i; + QTestState *s = m48t59_qtest_start(); for (i = 0; i < 1000; i++) { uint8_t reg, val; @@ -237,24 +229,38 @@ static void fuzz_registers(void) cmos_write(reg, val); cmos_read(reg); } + + qtest_quit(s); +} + +static void base_setup(void) +{ + const char *arch = qtest_get_arch(); + + if (g_str_equal(arch, "sparc")) { + /* Note: For sparc64, we'd need to map-in the PCI bridge memory first */ + base = 0x71200000; + base_year = 1968; + use_mmio = true; + } else { + g_assert_not_reached(); + } } int main(int argc, char **argv) { - QTestState *s = NULL; int ret; - g_test_init(&argc, &argv, NULL); + base_setup(); - s = qtest_start("-rtc clock=vm"); + g_test_init(&argc, &argv, NULL); - qtest_add_func("/rtc/bcd/check-time", bcd_check_time); + if (g_test_slow()) { + /* Do not run this in timing-sensitive environments */ + qtest_add_func("/rtc/bcd-check-time", bcd_check_time); + } qtest_add_func("/rtc/fuzz-registers", fuzz_registers); ret = g_test_run(); - if (s) { - qtest_quit(s); - } - return ret; }