From patchwork Thu Feb 22 12:42:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 10235489 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 95D9360224 for ; Thu, 22 Feb 2018 12:48:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 930D428C2E for ; Thu, 22 Feb 2018 12:48:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8802428C34; Thu, 22 Feb 2018 12:48:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D10DE28C33 for ; Thu, 22 Feb 2018 12:48:37 +0000 (UTC) Received: from localhost ([::1]:37801 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eoqId-0000VZ-Qy for patchwork-qemu-devel@patchwork.kernel.org; Thu, 22 Feb 2018 07:48:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54019) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eoqEl-0005f9-Nk for qemu-devel@nongnu.org; Thu, 22 Feb 2018 07:44:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eoqEk-0005Nc-7M for qemu-devel@nongnu.org; Thu, 22 Feb 2018 07:44:35 -0500 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:48442 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eoqEf-00059v-8d; Thu, 22 Feb 2018 07:44:29 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CB7E78182D20; Thu, 22 Feb 2018 12:44:28 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.37.153.18]) by smtp.corp.redhat.com (Postfix) with ESMTP id D4CE82024CA9; Thu, 22 Feb 2018 12:44:27 +0000 (UTC) From: Igor Mammedov To: qemu-devel@nongnu.org Date: Thu, 22 Feb 2018 13:42:53 +0100 Message-Id: <1519303376-92875-7-git-send-email-imammedo@redhat.com> In-Reply-To: <1519303376-92875-1-git-send-email-imammedo@redhat.com> References: <1519303376-92875-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Thu, 22 Feb 2018 12:44:28 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Thu, 22 Feb 2018 12:44:28 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'imammedo@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH 6/9] pc: acpi: use build_append_foo() API to construct FADT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Shannon Zhao , qemu-arm@nongnu.org, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP build_append_foo() API doesn't need explicit endianness conversions which eliminates a source of errors and it makes build_fadt() look like declarative definition of FADT table in ACPI spec, which makes it easy to review. Also it allows easily extending FADT to support other revisions which will be used by follow up patches where build_fadt() will be reused for ARM target. Signed-off-by: Igor Mammedov Reviewed-by: Eric Auger --- hw/i386/acpi-build.c | 147 +++++++++++++++++++++++++++++---------------------- 1 file changed, 85 insertions(+), 62 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 706ba35..544a4bc 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -299,87 +299,110 @@ build_facs(GArray *table_data, BIOSLinker *linker) facs->length = cpu_to_le32(sizeof(*facs)); } -/* Load chipset information in FADT */ -static void fadt_setup(AcpiFadtDescriptorRev3 *fadt, AcpiFadtData f) -{ - fadt->model = f.int_model; - fadt->reserved1 = 0; - fadt->sci_int = cpu_to_le16(f.sci_int); - fadt->smi_cmd = cpu_to_le32(f.smi_cmd); - fadt->acpi_enable = f.acpi_enable_cmd; - fadt->acpi_disable = f.acpi_disable_cmd; - /* EVT, CNT, TMR offset matches hw/acpi/core.c */ - fadt->pm1a_evt_blk = cpu_to_le32(f.pm1_evt.address); - fadt->pm1a_cnt_blk = cpu_to_le32(f.pm1_cnt.address); - fadt->pm_tmr_blk = cpu_to_le32(f.pm_tmr.address); - fadt->gpe0_blk = cpu_to_le32(f.gpe0_blk.address); - /* EVT, CNT, TMR length matches hw/acpi/core.c */ - fadt->pm1_evt_len = f.pm1_evt.bit_width / 8; - fadt->pm1_cnt_len = f.pm1_cnt.bit_width / 8; - fadt->pm_tmr_len = f.pm_tmr.bit_width / 8; - fadt->gpe0_blk_len = f.gpe0_blk.bit_width / 8; - fadt->plvl2_lat = cpu_to_le16(f.c2_latency); - fadt->plvl3_lat = cpu_to_le16(f.c3_latency); - fadt->flags = cpu_to_le32(f.flags); - fadt->century = f.rtc_century; - if (f.rev == 1) { - return; - } - - fadt->reset_value = f.reset_val; - fadt->reset_register = f.reset_reg; - fadt->reset_register.address = cpu_to_le64(f.reset_reg.address); - - fadt->xpm1a_event_block = f.pm1_evt; - fadt->xpm1a_event_block.address = cpu_to_le64(f.pm1_evt.address); - - fadt->xpm1a_control_block = f.pm1_cnt; - fadt->xpm1a_control_block.address = cpu_to_le64(f.pm1_cnt.address); - - fadt->xpm_timer_block = f.pm_tmr; - fadt->xpm_timer_block.address = cpu_to_le64(f.pm_tmr.address); - - fadt->xgpe0_block = f.gpe0_blk; - fadt->xgpe0_block.address = cpu_to_le64(f.gpe0_blk.address); -} - - /* FADT */ static void -build_fadt(GArray *table_data, BIOSLinker *linker, AcpiFadtData *f, +build_fadt(GArray *tbl, BIOSLinker *linker, AcpiFadtData *f, const char *oem_id, const char *oem_table_id) { - AcpiFadtDescriptorRev3 *fadt = acpi_data_push(table_data, sizeof(*fadt)); - unsigned fw_ctrl_offset = (char *)&fadt->firmware_ctrl - table_data->data; - unsigned dsdt_entry_offset = (char *)&fadt->dsdt - table_data->data; - unsigned xdsdt_entry_offset = (char *)&fadt->x_dsdt - table_data->data; - int fadt_size = sizeof(*fadt); + int off; + int fadt_start = tbl->len; + + acpi_data_push(tbl, sizeof(AcpiTableHeader)); - /* FACS address to be filled by Guest linker */ + /* FACS address to be filled by Guest linker at runtime */ + off = tbl->len; + build_append_int_noprefix(tbl, 0, 4); /* FIRMWARE_CTRL */ if (f->facs_tbl_offset) { bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, fw_ctrl_offset, sizeof(fadt->firmware_ctrl), + ACPI_BUILD_TABLE_FILE, off, 4, ACPI_BUILD_TABLE_FILE, *f->facs_tbl_offset); } - /* DSDT address to be filled by Guest linker */ - fadt_setup(fadt, *f); + /* DSDT address to be filled by Guest linker at runtime */ + off = tbl->len; + build_append_int_noprefix(tbl, 0, 4); /* DSDT */ if (f->dsdt_tbl_offset) { bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, dsdt_entry_offset, sizeof(fadt->dsdt), + ACPI_BUILD_TABLE_FILE, off, 4, ACPI_BUILD_TABLE_FILE, *f->dsdt_tbl_offset); } + + /* ACPI1.0: INT_MODEL, ACPI2.0+: Reserved */ + build_append_int_noprefix(tbl, f->int_model /* Multiple APIC */, 1); + /* Preferred_PM_Profile */ + build_append_int_noprefix(tbl, 0 /* Unspecified */, 1); + build_append_int_noprefix(tbl, f->sci_int, 2); /* SCI_INT */ + build_append_int_noprefix(tbl, f->smi_cmd, 4); /* SMI_CMD */ + build_append_int_noprefix(tbl, f->acpi_enable_cmd, 1); /* ACPI_ENABLE */ + build_append_int_noprefix(tbl, f->acpi_disable_cmd, 1); /* ACPI_DISABLE */ + build_append_int_noprefix(tbl, 0 /* not supported */, 1); /* S4BIOS_REQ */ + /* ACPI1.0: Reserved, ACPI2.0+: PSTATE_CNT */ + build_append_int_noprefix(tbl, 0, 1); + build_append_int_noprefix(tbl, f->pm1_evt.address, 4); /* PM1a_EVT_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* PM1b_EVT_BLK */ + build_append_int_noprefix(tbl, f->pm1_cnt.address, 4); /* PM1a_CNT_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* PM1b_CNT_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* PM2_CNT_BLK */ + build_append_int_noprefix(tbl, f->pm_tmr.address, 4); /* PM_TMR_BLK */ + build_append_int_noprefix(tbl, f->gpe0_blk.address, 4); /* GPE0_BLK */ + build_append_int_noprefix(tbl, 0, 4); /* GPE1_BLK */ + /* PM1_EVT_LEN */ + build_append_int_noprefix(tbl, f->pm1_evt.bit_width / 8, 1); + /* PM1_CNT_LEN */ + build_append_int_noprefix(tbl, f->pm1_cnt.bit_width / 8, 1); + build_append_int_noprefix(tbl, 0, 1); /* PM2_CNT_LEN */ + build_append_int_noprefix(tbl, f->pm_tmr.bit_width / 8, 1); /* PM_TMR_LEN */ + /* GPE0_BLK_LEN */ + build_append_int_noprefix(tbl, f->gpe0_blk.bit_width / 8, 1); + build_append_int_noprefix(tbl, 0, 1); /* GPE1_BLK_LEN */ + build_append_int_noprefix(tbl, 0, 1); /* GPE1_BASE */ + build_append_int_noprefix(tbl, 0, 1); /* CST_CNT */ + build_append_int_noprefix(tbl, f->c2_latency, 2); /* P_LVL2_LAT */ + build_append_int_noprefix(tbl, f->c3_latency, 2); /* P_LVL3_LAT */ + build_append_int_noprefix(tbl, 0, 2); /* FLUSH_SIZE */ + build_append_int_noprefix(tbl, 0, 2); /* FLUSH_STRIDE */ + build_append_int_noprefix(tbl, 0, 1); /* DUTY_OFFSET */ + build_append_int_noprefix(tbl, 0, 1); /* DUTY_WIDTH */ + build_append_int_noprefix(tbl, 0, 1); /* DAY_ALRM */ + build_append_int_noprefix(tbl, 0, 1); /* MON_ALRM */ + build_append_int_noprefix(tbl, f->rtc_century, 1); /* CENTURY */ + build_append_int_noprefix(tbl, 0, 2); /* IAPC_BOOT_ARCH */ + build_append_int_noprefix(tbl, 0, 1); /* Reserved */ + build_append_int_noprefix(tbl, f->flags, 4); /* Flags */ + if (f->rev == 1) { - fadt_size = offsetof(typeof(*fadt), reset_register); - } else if (f->xdsdt_tbl_offset) { + goto build_hdr; + } + + build_append_gas_from_struct(tbl, &f->reset_reg); /* RESET_REG */ + build_append_int_noprefix(tbl, f->reset_val, 1); /* RESET_VALUE */ + build_append_int_noprefix(tbl, 0, 3); /* Reserved, ACPI 3.0 */ + build_append_int_noprefix(tbl, 0, 8); /* X_FIRMWARE_CTRL */ + + /* XDSDT address to be filled by Guest linker at runtime */ + off = tbl->len; + build_append_int_noprefix(tbl, 0, 8); /* X_DSDT */ + if (f->xdsdt_tbl_offset) { bios_linker_loader_add_pointer(linker, - ACPI_BUILD_TABLE_FILE, xdsdt_entry_offset, sizeof(fadt->x_dsdt), + ACPI_BUILD_TABLE_FILE, off, 8, ACPI_BUILD_TABLE_FILE, *f->xdsdt_tbl_offset); } - build_header(linker, table_data, - (void *)fadt, "FACP", fadt_size, f->rev, - oem_id, oem_table_id); + build_append_gas_from_struct(tbl, &f->pm1_evt); /* X_PM1a_EVT_BLK */ + /* X_PM1b_EVT_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); + build_append_gas_from_struct(tbl, &f->pm1_cnt); /* X_PM1a_CNT_BLK */ + /* X_PM1b_CNT_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); + /* X_PM2_CNT_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); + build_append_gas_from_struct(tbl, &f->pm_tmr); /* X_PM_TMR_BLK */ + build_append_gas_from_struct(tbl, &f->gpe0_blk); /* X_GPE0_BLK */ + build_append_gas(tbl, AML_AS_SYSTEM_MEMORY, 0 , 0, 0, 0); /* X_GPE1_BLK */ + +build_hdr: + build_header(linker, tbl, (void *)(tbl->data + fadt_start), + "FACP", tbl->len - fadt_start, f->rev, oem_id, oem_table_id); } void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,