From patchwork Fri Jun 29 11:15:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 10496259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8EB6760230 for ; Fri, 29 Jun 2018 11:18:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7F76F298A6 for ; Fri, 29 Jun 2018 11:18:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 72E6A298A7; Fri, 29 Jun 2018 11:18:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 206E3298A9 for ; Fri, 29 Jun 2018 11:18:07 +0000 (UTC) Received: from localhost ([::1]:41211 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYrPi-00013i-9l for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 Jun 2018 07:18:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36407) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYrO3-0008Gp-IM for qemu-devel@nongnu.org; Fri, 29 Jun 2018 07:16:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fYrO2-0002FP-Pe for qemu-devel@nongnu.org; Fri, 29 Jun 2018 07:16:23 -0400 Received: from foss.arm.com ([217.140.101.70]:39262) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fYrO2-0002Ep-Ip for qemu-devel@nongnu.org; Fri, 29 Jun 2018 07:16:22 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C59F61682; Fri, 29 Jun 2018 04:16:21 -0700 (PDT) Received: from en101.cambridge.arm.com (en101.cambridge.arm.com [10.1.206.73]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6EF483F266; Fri, 29 Jun 2018 04:16:19 -0700 (PDT) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Date: Fri, 29 Jun 2018 12:15:23 +0100 Message-Id: <1530270944-11351-4-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> References: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.140.101.70 Subject: [Qemu-devel] [PATCH v3 03/20] arm64: Add a helper for PARange to physical shift conversion X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cdall@kernel.org, kvm@vger.kernel.org, Suzuki K Poulose , marc.zyngier@arm.com, catalin.marinas@arm.com, punit.agrawal@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, qemu-devel@nongnu.org, eric.auger@redhat.com, julien.grall@arm.com, james.morse@arm.com, kvmarm@lists.cs.columbia.edu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP On arm64, ID_AA64MMFR0_EL1.PARange encodes the maximum Physical Address range supported by the CPU. Add a helper to decode this to actual physical shift. If we hit an unallocated value, return the maximum range supported by the kernel. This is will be used by the KVM to set the VTCR_EL2.T0SZ, as it is about to move its place. Having this helper keeps the code movement cleaner. Cc: Catalin Marinas Cc: Marc Zyngier Cc: James Morse Cc: Christoffer Dall Signed-off-by: Suzuki K Poulose Reviewed-by: Eric Auger --- Changes since V2: - Split the patch - Limit the physical shift only for values unrecognized. --- arch/arm64/include/asm/cpufeature.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 1717ba1..855cf0e 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -530,6 +530,19 @@ void arm64_set_ssbd_mitigation(bool state); static inline void arm64_set_ssbd_mitigation(bool state) {} #endif +static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange) +{ + switch (parange) { + case 0: return 32; + case 1: return 36; + case 2: return 40; + case 3: return 42; + case 4: return 44; + case 5: return 48; + case 6: return 52; + default: return CONFIG_ARM64_PA_BITS; + } +} #endif /* __ASSEMBLY__ */ #endif