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[PULL,26/27] target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH

Message ID 1539779635-15445-27-git-send-email-aleksandar.markovic@rt-rk.com (mailing list archive)
State New, archived
Headers show
Series MIPS pull request for October 2018 - part 1 | expand

Commit Message

Aleksandar Markovic Oct. 17, 2018, 12:33 p.m. UTC 
From: Stefan Markovic <smarkovic@wavecomp.com>

Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by
Coverity (CID 1395627).

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 7f97f08..a63509a 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -19969,8 +19969,8 @@  static void gen_pool32a5_nanomips_insn(DisasContext *ctx, int opc,
         case 0:
             /* SHRA_PH */
             gen_helper_shra_ph(v1_t, t0, v1_t);
-            break;
             gen_store_gpr(v1_t, rt);
+            break;
         case 1:
             /* SHRA_R_PH */
             gen_helper_shra_r_ph(v1_t, t0, v1_t);