| Message ID | 154394084810.28192.18333845343054369357.stgit@gimli.home (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | pcie: Enhanced link speed and width support | expand |
On Tue, 04 Dec 2018 09:27:28 -0700 Alex Williamson <alex.williamson@redhat.com> wrote: > Change the default speed and width for new machine types to the > fastest and widest currently supported. This should be compatible to > the PCIe 4.0 spec. Pre-QEMU-4.0 machine types remain at 2.5GT/s, x1 > width. > > Cc: Michael S. Tsirkin <mst@redhat.com> > Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> > Signed-off-by: Alex Williamson <alex.williamson@redhat.com> > --- > hw/pci-bridge/gen_pcie_root_port.c | 4 ++-- > include/hw/compat.h | 10 +++++++++- > 2 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c > index ca5418a89dd2..9766edb44596 100644 > --- a/hw/pci-bridge/gen_pcie_root_port.c > +++ b/hw/pci-bridge/gen_pcie_root_port.c > @@ -125,9 +125,9 @@ static Property gen_rp_props[] = { > DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort, > res_reserve.mem_pref_64, -1), > DEFINE_PROP_PCIE_LINK_SPEED("x-speed", PCIESlot, > - speed, PCIE_LINK_SPEED_2_5), > + speed, PCIE_LINK_SPEED_16), > DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, > - width, PCIE_LINK_WIDTH_1), > + width, PCIE_LINK_WIDTH_32), > DEFINE_PROP_END_OF_LIST() > }; > > diff --git a/include/hw/compat.h b/include/hw/compat.h > index 70958328fe7a..702cc62277db 100644 > --- a/include/hw/compat.h > +++ b/include/hw/compat.h > @@ -2,7 +2,15 @@ > #define HW_COMPAT_H > > #define HW_COMPAT_3_1 \ > - /* empty */ > + {\ > + .driver = "pcie-root-port",\ > + .property = "speed",\ > + .value = "2_5",\ > + },{\ > + .driver = "pcie-root-port",\ > + .property = "width",\ > + .value = "1",\ > + }, Whoops, these should be x-speed and x-width too. Will correct. Thanks, Alex > #define HW_COMPAT_3_0 \ > /* empty */ >
Hi On 12/4/18 5:27 PM, Alex Williamson wrote: > Change the default speed and width for new machine types to the > fastest and widest currently supported. This should be compatible to > the PCIe 4.0 spec. Pre-QEMU-4.0 machine types remain at 2.5GT/s, x1 > width. > > Cc: Michael S. Tsirkin <mst@redhat.com> > Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> > Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Thanks Eric > --- > hw/pci-bridge/gen_pcie_root_port.c | 4 ++-- > include/hw/compat.h | 10 +++++++++- > 2 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c > index ca5418a89dd2..9766edb44596 100644 > --- a/hw/pci-bridge/gen_pcie_root_port.c > +++ b/hw/pci-bridge/gen_pcie_root_port.c > @@ -125,9 +125,9 @@ static Property gen_rp_props[] = { > DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort, > res_reserve.mem_pref_64, -1), > DEFINE_PROP_PCIE_LINK_SPEED("x-speed", PCIESlot, > - speed, PCIE_LINK_SPEED_2_5), > + speed, PCIE_LINK_SPEED_16), > DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, > - width, PCIE_LINK_WIDTH_1), > + width, PCIE_LINK_WIDTH_32), > DEFINE_PROP_END_OF_LIST() > }; > > diff --git a/include/hw/compat.h b/include/hw/compat.h > index 70958328fe7a..702cc62277db 100644 > --- a/include/hw/compat.h > +++ b/include/hw/compat.h > @@ -2,7 +2,15 @@ > #define HW_COMPAT_H > > #define HW_COMPAT_3_1 \ > - /* empty */ > + {\ > + .driver = "pcie-root-port",\ > + .property = "speed",\ > + .value = "2_5",\ > + },{\ > + .driver = "pcie-root-port",\ > + .property = "width",\ > + .value = "1",\ > + }, > > #define HW_COMPAT_3_0 \ > /* empty */ > >
diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index ca5418a89dd2..9766edb44596 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -125,9 +125,9 @@ static Property gen_rp_props[] = { DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort, res_reserve.mem_pref_64, -1), DEFINE_PROP_PCIE_LINK_SPEED("x-speed", PCIESlot, - speed, PCIE_LINK_SPEED_2_5), + speed, PCIE_LINK_SPEED_16), DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, - width, PCIE_LINK_WIDTH_1), + width, PCIE_LINK_WIDTH_32), DEFINE_PROP_END_OF_LIST() }; diff --git a/include/hw/compat.h b/include/hw/compat.h index 70958328fe7a..702cc62277db 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -2,7 +2,15 @@ #define HW_COMPAT_H #define HW_COMPAT_3_1 \ - /* empty */ + {\ + .driver = "pcie-root-port",\ + .property = "speed",\ + .value = "2_5",\ + },{\ + .driver = "pcie-root-port",\ + .property = "width",\ + .value = "1",\ + }, #define HW_COMPAT_3_0 \ /* empty */
Change the default speed and width for new machine types to the fastest and widest currently supported. This should be compatible to the PCIe 4.0 spec. Pre-QEMU-4.0 machine types remain at 2.5GT/s, x1 width. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> --- hw/pci-bridge/gen_pcie_root_port.c | 4 ++-- include/hw/compat.h | 10 +++++++++- 2 files changed, 11 insertions(+), 3 deletions(-)